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| author | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-04-28 11:08:32 +0000 |
|---|---|---|
| committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2017-05-09 09:24:12 +0000 |
| commit | 699773a867d1095790cce38744d9b2c38a1f551e (patch) | |
| tree | 21dba452bf538f3dc8e4e4d1d87b396a971dccb8 | |
| parent | 708258aba60cfeb092b11c2aa6bb867dce233d47 (diff) | |
| download | gem5-699773a867d1095790cce38744d9b2c38a1f551e.tar.xz | |
kvm, arm: Fix incorrect PSTATE sync
The state transfer code wasn't reading back PSTATE correctly from the
CPU prior to updating the thread context and was incorreclty writing
the register as a 32-bit value when updating KVM. Correctly read back
the state before updating gem5's view of PSTATE and cast the value to
a uint64_t.
Change-Id: I0a6ff5b77b897c756b20a20f65c420f42386360f
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/2963
Reviewed-by: Rahul Thakur <rjthakur@google.com>
| -rw-r--r-- | src/arch/arm/kvm/armv8_cpu.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/arm/kvm/armv8_cpu.cc b/src/arch/arm/kvm/armv8_cpu.cc index 48bcc5fe9..352fb2c80 100644 --- a/src/arch/arm/kvm/armv8_cpu.cc +++ b/src/arch/arm/kvm/armv8_cpu.cc @@ -223,7 +223,7 @@ ArmV8KvmCPU::updateKvmState() cpsr.ge = 0; } DPRINTF(KvmContext, " %s := 0x%x\n", "PSTATE", cpsr); - setOneReg(INT_REG(regs.pstate), cpsr); + setOneReg(INT_REG(regs.pstate), static_cast<uint64_t>(cpsr)); for (const auto &ri : miscRegMap) { const uint64_t value(tc->readMiscReg(ri.idx)); @@ -269,7 +269,7 @@ ArmV8KvmCPU::updateThreadContext() DPRINTF(KvmContext, "In updateThreadContext():\n"); // Update pstate thread context - const CPSR cpsr(tc->readMiscRegNoEffect(MISCREG_CPSR)); + const CPSR cpsr(getOneRegU64(INT_REG(regs.pstate))); DPRINTF(KvmContext, " %s := 0x%x\n", "PSTATE", cpsr); tc->setMiscRegNoEffect(MISCREG_CPSR, cpsr); tc->setCCReg(CCREG_NZ, cpsr.nz); |