summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorGabe Black <gblack@eecs.umich.edu>2006-11-14 01:31:37 -0500
committerGabe Black <gblack@eecs.umich.edu>2006-11-14 01:31:37 -0500
commit7632198a6e04a0a448fb05fa9080c5a48012702b (patch)
tree15a2eb395628d37320922c3dcd51ae3454c6dc19
parent8d234a4bc5adb6dcf26d73596c45a29e616bb4c2 (diff)
parent20730b790c98bfb29d1f57911b32610af4d6e35b (diff)
downloadgem5-7632198a6e04a0a448fb05fa9080c5a48012702b.tar.xz
Merge 141.212.106.238:/home/gblack/m5/newmemmemops
into zizzer.eecs.umich.edu:/.automount/wexford/x/gblack/m5/newmem --HG-- extra : convert_revision : cda58e6e63f2f909b85a510fb76d35d49d8042b9
-rw-r--r--src/arch/sparc/faults.cc11
-rw-r--r--src/arch/sparc/isa/formats/mem/util.isa37
-rw-r--r--src/arch/sparc/isa/formats/priv.isa19
-rw-r--r--src/arch/sparc/miscregfile.cc3
4 files changed, 49 insertions, 21 deletions
diff --git a/src/arch/sparc/faults.cc b/src/arch/sparc/faults.cc
index 4cf411d3b..3ec41ba61 100644
--- a/src/arch/sparc/faults.cc
+++ b/src/arch/sparc/faults.cc
@@ -593,7 +593,16 @@ void PowerOnReset::invoke(ThreadContext * tc)
tc->setMiscReg(MISCREG_PSTATE, 1 << 4);
//Turn on red and hpriv, set everything else to 0
- tc->setMiscReg(MISCREG_HPSTATE, (1 << 5) | (1 << 2));
+ MiscReg HPSTATE = tc->readMiscReg(MISCREG_HPSTATE);
+ //HPSTATE.red = 1
+ HPSTATE |= (1 << 5);
+ //HPSTATE.hpriv = 1
+ HPSTATE |= (1 << 2);
+ //HPSTATE.ibe = 0
+ HPSTATE &= ~(1 << 10);
+ //HPSTATE.tlz = 0
+ HPSTATE &= ~(1 << 0);
+ tc->setMiscReg(MISCREG_HPSTATE, HPSTATE);
//The tick register is unreadable by nonprivileged software
tc->setMiscReg(MISCREG_TICK, 1ULL << 63);
diff --git a/src/arch/sparc/isa/formats/mem/util.isa b/src/arch/sparc/isa/formats/mem/util.isa
index 00360aa43..857f37160 100644
--- a/src/arch/sparc/isa/formats/mem/util.isa
+++ b/src/arch/sparc/isa/formats/mem/util.isa
@@ -76,23 +76,26 @@ output decoder {{
{
std::stringstream response;
bool load = flags[IsLoad];
- bool save = flags[IsStore];
+ bool store = flags[IsStore];
printMnemonic(response, mnemonic);
- if(save)
+ if(store)
{
- printReg(response, _srcRegIdx[0]);
+ printReg(response, _srcRegIdx[0]);
ccprintf(response, ", ");
}
- ccprintf(response, "[ ");
- printReg(response, _srcRegIdx[!save ? 0 : 1]);
- ccprintf(response, " + ");
- printReg(response, _srcRegIdx[!save ? 1 : 2]);
- ccprintf(response, " ]");
+ ccprintf(response, "[");
+ if(_srcRegIdx[!store ? 0 : 1] != 0)
+ {
+ printSrcReg(response, !store ? 0 : 1);
+ ccprintf(response, " + ");
+ }
+ printSrcReg(response, !store ? 1 : 2);
+ ccprintf(response, "]");
if(load)
{
ccprintf(response, ", ");
- printReg(response, _destRegIdx[0]);
+ printReg(response, _destRegIdx[0]);
}
return response.str();
@@ -108,19 +111,23 @@ output decoder {{
printMnemonic(response, mnemonic);
if(save)
{
- printReg(response, _srcRegIdx[0]);
+ printReg(response, _srcRegIdx[0]);
ccprintf(response, ", ");
}
- ccprintf(response, "[ ");
- printReg(response, _srcRegIdx[!save ? 0 : 1]);
+ ccprintf(response, "[");
+ if(_srcRegIdx[!save ? 0 : 1] != 0)
+ {
+ printReg(response, _srcRegIdx[!save ? 0 : 1]);
+ ccprintf(response, " + ");
+ }
if(imm >= 0)
- ccprintf(response, " + 0x%x ]", imm);
+ ccprintf(response, "0x%x]", imm);
else
- ccprintf(response, " + -0x%x ]", -imm);
+ ccprintf(response, "-0x%x]", -imm);
if(load)
{
ccprintf(response, ", ");
- printReg(response, _destRegIdx[0]);
+ printReg(response, _destRegIdx[0]);
}
return response.str();
diff --git a/src/arch/sparc/isa/formats/priv.isa b/src/arch/sparc/isa/formats/priv.isa
index 94a68aebe..3d47ca02f 100644
--- a/src/arch/sparc/isa/formats/priv.isa
+++ b/src/arch/sparc/isa/formats/priv.isa
@@ -153,8 +153,13 @@ output decoder {{
printMnemonic(response, mnemonic);
ccprintf(response, " ");
- printSrcReg(response, 0);
- ccprintf(response, ", ");
+ //If the first reg is %g0, don't print it.
+ //This improves readability
+ if(_srcRegIdx[0] != 0)
+ {
+ printSrcReg(response, 0);
+ ccprintf(response, ", ");
+ }
printSrcReg(response, 1);
ccprintf(response, ", %%%s", regName);
@@ -169,8 +174,14 @@ output decoder {{
printMnemonic(response, mnemonic);
ccprintf(response, " ");
- printSrcReg(response, 0);
- ccprintf(response, ", 0x%x, %%%s", imm, regName);
+ //If the first reg is %g0, don't print it.
+ //This improves readability
+ if(_srcRegIdx[0] != 0)
+ {
+ printSrcReg(response, 0);
+ ccprintf(response, ", ");
+ }
+ ccprintf(response, "0x%x, %%%s", imm, regName);
return response.str();
}
diff --git a/src/arch/sparc/miscregfile.cc b/src/arch/sparc/miscregfile.cc
index d52e3983f..d9d7f4411 100644
--- a/src/arch/sparc/miscregfile.cc
+++ b/src/arch/sparc/miscregfile.cc
@@ -88,7 +88,8 @@ void MiscRegFile::reset()
otherwin = 0;
wstate = 0;
gl = 0;
- hpstate = 0;
+ //In a T1, bit 11 is apparently always 1
+ hpstate = (1 << 11);
memset(htstate, 0, sizeof(htstate));
hintp = 0;
htba = 0;