diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2009-08-05 03:03:07 -0700 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2009-08-05 03:03:07 -0700 |
commit | df1abc44128b866596170d4589580a7585f06b58 (patch) | |
tree | 645da0123486149b8098e990f0dbcf51d3004402 | |
parent | c4140d7d6038a3b44dfd04065e02666975cfa651 (diff) | |
download | gem5-df1abc44128b866596170d4589580a7585f06b58.tar.xz |
X86: Let microops force folding an index into the high byte of a register.
-rw-r--r-- | src/arch/x86/isa/microasm.isa | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index 0cc72bf7b..c6f5e9cdd 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -151,6 +151,10 @@ let {{ assembler.symbols["r%s" % reg] = \ regIdx("INTREG_R%s" % reg.upper()) + for reg in ('ah', 'bh', 'ch', 'dh'): + assembler.symbols[reg] = \ + regIdx("INTREG_FOLDED(INTREG_%s, IntFoldBit)" % reg.upper()) + for reg in range(16): assembler.symbols["cr%d" % reg] = regIdx("MISCREG_CR%d" % reg) |