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authorGabe Black <gblack@eecs.umich.edu>2008-10-11 12:17:24 -0700
committerGabe Black <gblack@eecs.umich.edu>2008-10-11 12:17:24 -0700
commitf621b7b81f0913612381d5dc4993f52bb2116902 (patch)
treea0438fb51a3721bf432da12b76c0b8b3160071ef
parentda7209ec93f3cdad11c02906357f06fa29652996 (diff)
downloadgem5-f621b7b81f0913612381d5dc4993f52bb2116902.tar.xz
CPU: Eliminate the simPalCheck funciton.
-rw-r--r--src/arch/alpha/ev5.cc33
-rw-r--r--src/arch/alpha/isa/decoder.isa23
-rw-r--r--src/arch/alpha/isa/main.isa1
-rw-r--r--src/cpu/checker/cpu.hh1
-rw-r--r--src/cpu/exec_context.hh8
-rw-r--r--src/cpu/o3/cpu.cc30
-rw-r--r--src/cpu/o3/cpu.hh2
-rw-r--r--src/cpu/o3/dyn_inst.hh1
-rw-r--r--src/cpu/o3/dyn_inst_impl.hh10
-rw-r--r--src/cpu/ozone/cpu.hh1
-rw-r--r--src/cpu/ozone/cpu_impl.hh25
-rw-r--r--src/cpu/ozone/dyn_inst.hh1
-rw-r--r--src/cpu/ozone/dyn_inst_impl.hh7
-rw-r--r--src/cpu/simple/base.hh1
-rw-r--r--src/cpu/simple_thread.hh2
15 files changed, 24 insertions, 122 deletions
diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index eefe86bff..c11b3632e 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -547,36 +547,3 @@ copyIprs(ThreadContext *src, ThreadContext *dest)
}
} // namespace AlphaISA
-
-#if FULL_SYSTEM
-
-using namespace AlphaISA;
-
-/**
- * Check for special simulator handling of specific PAL calls.
- * If return value is false, actual PAL call will be suppressed.
- */
-bool
-SimpleThread::simPalCheck(int palFunc)
-{
- if (kernelStats)
- kernelStats->callpal(palFunc, tc);
-
- switch (palFunc) {
- case PAL::halt:
- halt();
- if (--System::numSystemsRunning == 0)
- exitSimLoop("all cpus halted");
- break;
-
- case PAL::bpt:
- case PAL::bugchk:
- if (system->breakpoint())
- return false;
- break;
- }
-
- return true;
-}
-
-#endif // FULL_SYSTEM
diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index 8025ba69f..06676ae87 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -698,7 +698,28 @@ decode OPCODE default Unknown::unknown() {
else {
// check to see if simulator wants to do something special
// on this PAL call (including maybe suppress it)
- bool dopal = xc->simPalCheck(palFunc);
+
+ bool dopal = true;
+
+ ThreadContext * tc = xc->tcBase();
+ AlphaISA::Kernel::Statistics * kernelStats = tc->getKernelStats();
+ System * system = tc->getSystemPtr();
+ if (kernelStats)
+ kernelStats->callpal(palFunc, tc);
+
+ switch (palFunc) {
+ case PAL::halt:
+ tc->halt();
+ if (--System::numSystemsRunning == 0)
+ exitSimLoop("all cpus halted");
+ break;
+
+ case PAL::bpt:
+ case PAL::bugchk:
+ if (system->breakpoint())
+ dopal = false;
+ break;
+ }
if (dopal) {
xc->setMiscReg(IPR_EXC_ADDR, NPC);
diff --git a/src/arch/alpha/isa/main.isa b/src/arch/alpha/isa/main.isa
index 078982697..0f7f74359 100644
--- a/src/arch/alpha/isa/main.isa
+++ b/src/arch/alpha/isa/main.isa
@@ -70,6 +70,7 @@ output exec {{
#if FULL_SYSTEM
#include "arch/alpha/kernel_stats.hh"
+#include "arch/alpha/osfpal.hh"
#include "sim/pseudo_inst.hh"
#endif
#include "arch/alpha/ipr.hh"
diff --git a/src/cpu/checker/cpu.hh b/src/cpu/checker/cpu.hh
index b234bf23f..0f01f17c5 100644
--- a/src/cpu/checker/cpu.hh
+++ b/src/cpu/checker/cpu.hh
@@ -337,7 +337,6 @@ class CheckerCPU : public BaseCPU
#if FULL_SYSTEM
void ev5_trap(Fault fault) { fault->invoke(tc); }
- bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
#else
// Assume that the normal CPU's call to syscall was successful.
// The checker's state would have already been updated by the syscall.
diff --git a/src/cpu/exec_context.hh b/src/cpu/exec_context.hh
index 93192246c..836cf4352 100644
--- a/src/cpu/exec_context.hh
+++ b/src/cpu/exec_context.hh
@@ -143,13 +143,7 @@ class ExecContext {
* given flags. */
void writeHint(Addr addr, int size, unsigned flags);
-#if FULL_SYSTEM
- /**
- * Check for special simulator handling of specific PAL calls. If
- * return value is false, actual PAL call will be suppressed.
- */
- bool simPalCheck(int palFunc);
-#else
+#if !FULL_SYSTEM
/** Executes a syscall specified by the callnum. */
void syscall(int64_t callnum);
#endif
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index 174f4a98d..ac816fc18 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -53,10 +53,6 @@
#include "cpu/checker/cpu.hh"
#endif
-#if THE_ISA == ALPHA_ISA
-#include "arch/alpha/osfpal.hh"
-#endif
-
class BaseCPUParams;
using namespace TheISA;
@@ -906,32 +902,6 @@ FullO3CPU<Impl>::post_interrupt(int int_num, int index)
}
template <class Impl>
-bool
-FullO3CPU<Impl>::simPalCheck(int palFunc, unsigned tid)
-{
-#if THE_ISA == ALPHA_ISA
- if (this->thread[tid]->kernelStats)
- this->thread[tid]->kernelStats->callpal(palFunc,
- this->threadContexts[tid]);
-
- switch (palFunc) {
- case PAL::halt:
- halt();
- if (--System::numSystemsRunning == 0)
- exitSimLoop("all cpus halted");
- break;
-
- case PAL::bpt:
- case PAL::bugchk:
- if (this->system->breakpoint())
- return false;
- break;
- }
-#endif
- return true;
-}
-
-template <class Impl>
Fault
FullO3CPU<Impl>::getInterrupts()
{
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index cdc1d2e58..07ba8d701 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -414,8 +414,6 @@ class FullO3CPU : public BaseO3CPU
/** Posts an interrupt. */
void post_interrupt(int int_num, int index);
- bool simPalCheck(int palFunc, unsigned tid);
-
/** Returns the Fault for any valid interrupt. */
Fault getInterrupts();
diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index ce59d802b..28dd60f5f 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -170,7 +170,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
#if FULL_SYSTEM
/** Traps to handle specified fault. */
void trap(Fault fault);
- bool simPalCheck(int palFunc);
#else
/** Calls a syscall. */
void syscall(int64_t callnum);
diff --git a/src/cpu/o3/dyn_inst_impl.hh b/src/cpu/o3/dyn_inst_impl.hh
index f85527f22..3b713ea8f 100644
--- a/src/cpu/o3/dyn_inst_impl.hh
+++ b/src/cpu/o3/dyn_inst_impl.hh
@@ -130,16 +130,6 @@ BaseO3DynInst<Impl>::trap(Fault fault)
{
this->cpu->trap(fault, this->threadNumber);
}
-
-template <class Impl>
-bool
-BaseO3DynInst<Impl>::simPalCheck(int palFunc)
-{
-#if THE_ISA != ALPHA_ISA
- panic("simPalCheck called, but PAL only exists in Alpha!\n");
-#endif
- return this->cpu->simPalCheck(palFunc, this->threadNumber);
-}
#else
template <class Impl>
void
diff --git a/src/cpu/ozone/cpu.hh b/src/cpu/ozone/cpu.hh
index e95accdfd..aeafb603a 100644
--- a/src/cpu/ozone/cpu.hh
+++ b/src/cpu/ozone/cpu.hh
@@ -510,7 +510,6 @@ class OzoneCPU : public BaseCPU
void dumpInsts() { frontEnd->dumpInsts(); }
#if FULL_SYSTEM
- bool simPalCheck(int palFunc);
void processInterrupts();
#else
void syscall(uint64_t &callnum);
diff --git a/src/cpu/ozone/cpu_impl.hh b/src/cpu/ozone/cpu_impl.hh
index eb7b1a13f..9c0b95a1a 100644
--- a/src/cpu/ozone/cpu_impl.hh
+++ b/src/cpu/ozone/cpu_impl.hh
@@ -685,31 +685,6 @@ OzoneCPU<Impl>::processInterrupts()
interrupt->invoke(thread.getTC());
}
}
-
-template <class Impl>
-bool
-OzoneCPU<Impl>::simPalCheck(int palFunc)
-{
- // Need to move this to ISA code
- // May also need to make this per thread
- thread.kernelStats->callpal(palFunc, tc);
-
- switch (palFunc) {
- case PAL::halt:
- haltContext(thread.readTid());
- if (--System::numSystemsRunning == 0)
- exitSimLoop("all cpus halted");
- break;
-
- case PAL::bpt:
- case PAL::bugchk:
- if (system->breakpoint())
- return false;
- break;
- }
-
- return true;
-}
#endif
template <class Impl>
diff --git a/src/cpu/ozone/dyn_inst.hh b/src/cpu/ozone/dyn_inst.hh
index deade9397..12a19e70d 100644
--- a/src/cpu/ozone/dyn_inst.hh
+++ b/src/cpu/ozone/dyn_inst.hh
@@ -241,7 +241,6 @@ class OzoneDynInst : public BaseDynInst<Impl>
#if FULL_SYSTEM
void trap(Fault fault);
- bool simPalCheck(int palFunc);
#else
void syscall(uint64_t &callnum);
#endif
diff --git a/src/cpu/ozone/dyn_inst_impl.hh b/src/cpu/ozone/dyn_inst_impl.hh
index 8fc5077a6..396007687 100644
--- a/src/cpu/ozone/dyn_inst_impl.hh
+++ b/src/cpu/ozone/dyn_inst_impl.hh
@@ -254,13 +254,6 @@ OzoneDynInst<Impl>::trap(Fault fault)
{
fault->invoke(this->thread->getTC());
}
-
-template <class Impl>
-bool
-OzoneDynInst<Impl>::simPalCheck(int palFunc)
-{
- return this->cpu->simPalCheck(palFunc);
-}
#else
template <class Impl>
void
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index b28a690bb..03c20a6f2 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -414,7 +414,6 @@ class BaseSimpleCPU : public BaseCPU
#if FULL_SYSTEM
void ev5_trap(Fault fault) { fault->invoke(tc); }
- bool simPalCheck(int palFunc) { return thread->simPalCheck(palFunc); }
#else
void syscall(int64_t callnum) { thread->syscall(callnum); }
#endif
diff --git a/src/cpu/simple_thread.hh b/src/cpu/simple_thread.hh
index 89d5ba99f..69d7b2548 100644
--- a/src/cpu/simple_thread.hh
+++ b/src/cpu/simple_thread.hh
@@ -185,8 +185,6 @@ class SimpleThread : public ThreadState
void dumpFuncProfile();
- bool simPalCheck(int palFunc);
-
#endif
/*******************************************