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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
commit | 36ca0658a412671ee18cde40b8d264e319fb4710 (patch) | |
tree | 1f5d0c6c4d5dbb7773357b33e86ebc8e64ff1883 | |
parent | 7939b4826506bde98d299e1ba7a38e17cd1fa785 (diff) | |
download | gem5-36ca0658a412671ee18cde40b8d264e319fb4710.tar.xz |
ARM: Get rid of obsoleted predicated inst formats, etc.
-rw-r--r-- | src/arch/arm/insts/pred_inst.cc | 5 | ||||
-rw-r--r-- | src/arch/arm/insts/pred_inst.hh | 46 | ||||
-rw-r--r-- | src/arch/arm/isa/formats/pred.isa | 58 |
3 files changed, 5 insertions, 104 deletions
diff --git a/src/arch/arm/insts/pred_inst.cc b/src/arch/arm/insts/pred_inst.cc index 94386e400..049c42f01 100644 --- a/src/arch/arm/insts/pred_inst.cc +++ b/src/arch/arm/insts/pred_inst.cc @@ -62,12 +62,9 @@ PredIntOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const } std::string -PredImmOpBase::generateDisassembly(Addr pc, const SymbolTable *symtab) const +PredImmOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const { std::stringstream ss; - unsigned rotate = machInst.rotate * 2; - uint32_t imm = machInst.imm; - imm = (imm << (32 - rotate)) | (imm >> rotate); printDataInst(ss, true, machInst.opcode4 == 0, machInst.sField, (IntRegIndex)(uint32_t)machInst.rd, (IntRegIndex)(uint32_t)machInst.rn, diff --git a/src/arch/arm/insts/pred_inst.hh b/src/arch/arm/insts/pred_inst.hh index 39d479d4f..8f92a2f26 100644 --- a/src/arch/arm/insts/pred_inst.hh +++ b/src/arch/arm/insts/pred_inst.hh @@ -98,65 +98,27 @@ class PredOp : public ArmStaticInst /** * Base class for predicated immediate operations. */ -class PredImmOpBase : public PredOp +class PredImmOp : public PredOp { protected: uint32_t imm; uint32_t rotated_imm; uint32_t rotated_carry; - - /// Constructor - PredImmOpBase(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : - PredOp(mnem, _machInst, __opClass), - imm(machInst.imm), rotated_imm(0), rotated_carry(0) - { - } - - std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; -}; - -/** - * Base class for regular predicated immediate operations. - */ -class PredImmOp : public PredImmOpBase -{ - protected: - uint32_t rotate; /// Constructor PredImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : - PredImmOpBase(mnem, _machInst, __opClass), + PredOp(mnem, _machInst, __opClass), + imm(machInst.imm), rotated_imm(0), rotated_carry(0), rotate(machInst.rotate << 1) { rotated_imm = rotate_imm(imm, rotate); if (rotate != 0) rotated_carry = bits(rotated_imm, 31); } -}; - -/** - * Base class for modified predicated immediate operations. - */ -class PredModImmOp : public PredImmOpBase -{ - protected: - uint8_t ctrlImm; - uint8_t dataImm; - - - /// Constructor - PredModImmOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : - PredImmOpBase(mnem, _machInst, __opClass), - ctrlImm(bits(machInst.instBits, 26) << 3 | - bits(machInst.instBits, 14, 12)), - dataImm(bits(machInst.instBits, 7, 0)) - { - rotated_imm = modified_imm(ctrlImm, dataImm); - rotated_carry = bits(rotated_imm, 31); - } + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; /** diff --git a/src/arch/arm/isa/formats/pred.isa b/src/arch/arm/isa/formats/pred.isa index d5e3fec19..897edc2dc 100644 --- a/src/arch/arm/isa/formats/pred.isa +++ b/src/arch/arm/isa/formats/pred.isa @@ -186,23 +186,6 @@ def format DataImmOp(code, flagtype = logic) {{ decode_block = DataImmDecode.subst(iop) }}; -def format DataModImmOp(code, flagtype = modImm) {{ - code += "resTemp = resTemp;" - iop = InstObjParams(name, Name + "ModImm", 'PredModImmOp', - {"code": code, - "predicate_test": predicateTest}) - ccIop = InstObjParams(name, Name + "ModImmCc", 'PredModImmOp', - {"code": code + getImmCcCode(flagtype), - "predicate_test": predicateTest}) - header_output = BasicDeclare.subst(iop) + \ - BasicDeclare.subst(ccIop) - decoder_output = BasicConstructor.subst(iop) + \ - BasicConstructor.subst(ccIop) - exec_output = PredOpExecute.subst(iop) + \ - PredOpExecute.subst(ccIop) - decode_block = DataImmDecode.subst(iop) -}}; - def format PredOp(code, *opt_flags) {{ iop = InstObjParams(name, Name, 'PredOp', {"code": code, @@ -225,44 +208,3 @@ def format PredImmOp(code, *opt_flags) {{ exec_output = PredOpExecute.subst(iop) }}; -def format PredImmOpCc(code, icValue, ivValue, *opt_flags) {{ - ccCode = calcCcCode % vars() - code += ccCode; - iop = InstObjParams(name, Name, 'PredImmOp', - {"code": code, - "cc_code": ccCode, - "predicate_test": predicateTest}, - opt_flags) - header_output = BasicDeclare.subst(iop) - decoder_output = BasicConstructor.subst(iop) - decode_block = BasicDecode.subst(iop) - exec_output = PredOpExecute.subst(iop) -}}; - -def format PredIntOp(code, *opt_flags) {{ - new_code = ArmGenericCodeSubs(code) - iop = InstObjParams(name, Name, 'PredIntOp', - {"code": new_code, - "predicate_test": predicateTest}, - opt_flags) - header_output = BasicDeclare.subst(iop) - decoder_output = BasicConstructor.subst(iop) - decode_block = BasicDecode.subst(iop) - exec_output = PredOpExecute.subst(iop) -}}; - -def format PredIntOpCc(code, icValue, ivValue, *opt_flags) {{ - ccCode = calcCcCode % vars() - code += ccCode; - new_code = ArmGenericCodeSubs(code) - iop = InstObjParams(name, Name, 'PredIntOp', - {"code": new_code, - "cc_code": ccCode, - "predicate_test": predicateTest}, - opt_flags) - header_output = BasicDeclare.subst(iop) - decoder_output = BasicConstructor.subst(iop) - decode_block = BasicDecode.subst(iop) - exec_output = PredOpExecute.subst(iop) -}}; - |