summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorRon Dreslinski <rdreslin@umich.edu>2005-04-02 20:36:08 -0500
committerRon Dreslinski <rdreslin@umich.edu>2005-04-02 20:36:08 -0500
commit4889d8f78826331d567327535fcd481fa2caf939 (patch)
treee6d319afc2a411f55a5bd62d965f9fc9cdb2d78e
parent46a832eb3b46ef9e51b7497f4fffa38f0513fac1 (diff)
downloadgem5-4889d8f78826331d567327535fcd481fa2caf939.tar.xz
Added support for multiple prefetch address from single access (depth of prefetch) also added the ability to squash some prefetchs to match the GHB technique
python/m5/objects/BaseCache.mpy: Added parameters --HG-- extra : convert_revision : 92b646eb61455d283a5c2ac0b3f8fbd62e39fb87
-rw-r--r--python/m5/objects/BaseCache.mpy11
1 files changed, 10 insertions, 1 deletions
diff --git a/python/m5/objects/BaseCache.mpy b/python/m5/objects/BaseCache.mpy
index 198665325..3727f2f01 100644
--- a/python/m5/objects/BaseCache.mpy
+++ b/python/m5/objects/BaseCache.mpy
@@ -1,5 +1,7 @@
from BaseMem import BaseMem
+class Prefetch(Enum): vals = ['none', 'tagged', 'stride', 'ghb']
+
simobj BaseCache(BaseMem):
type = 'BaseCache'
adaptive_compression = Param.Bool(False,
@@ -44,4 +46,11 @@ simobj BaseCache(BaseMem):
"Number of entries in the harware prefetch queue")
prefetch_past_page = Param.Bool(False,
"Allow prefetches to cross virtual page boundaries")
-
+ prefetch_serial_squash = Param.Bool(False,
+ "Squash prefetches with a later time on a subsequent miss")
+ prefetch_degree = Param.Int(1,
+ "Degree of the prefetch depth")
+ prefetch_latency = Param.Tick(10,
+ "Latency of the prefetcher")
+ prefetch_policy = Param.Prefetch('none',
+ "Type of prefetcher to use")