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authorLisa Hsu <hsul@eecs.umich.edu>2008-10-19 22:50:53 -0400
committerLisa Hsu <hsul@eecs.umich.edu>2008-10-19 22:50:53 -0400
commit4fac54f227f0ee0ee169955cb2510609434f7d85 (patch)
tree1e2dd75286dc97032763217613a6e829d88852f6
parent101c2d9174e34247c3f9013c24577a274a11ab39 (diff)
parent9b8011e255ee419a689706704b92e5a816fd8d34 (diff)
downloadgem5-4fac54f227f0ee0ee169955cb2510609434f7d85.tar.xz
Automated merge with ssh://daystrom.m5sim.org//z/repo/m5
-rw-r--r--src/arch/x86/interrupts.cc3
-rw-r--r--src/dev/x86/i8259.cc2
2 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/x86/interrupts.cc b/src/arch/x86/interrupts.cc
index bbc651378..bfb4d5b9c 100644
--- a/src/arch/x86/interrupts.cc
+++ b/src/arch/x86/interrupts.cc
@@ -294,10 +294,9 @@ X86ISA::Interrupts::recvMessage(PacketPtr pkt)
case 0:
{
TriggerIntMessage message = pkt->get<TriggerIntMessage>();
- uint8_t vector = message.vector;
DPRINTF(LocalApic,
"Got Trigger Interrupt message with vector %#x.\n",
- vector);
+ message.vector);
// Make sure we're really supposed to get this.
assert((message.destMode == 0 && message.destination == id) ||
(bits((int)message.destination, id)));
diff --git a/src/dev/x86/i8259.cc b/src/dev/x86/i8259.cc
index 2d460b96d..b3d3a5aa2 100644
--- a/src/dev/x86/i8259.cc
+++ b/src/dev/x86/i8259.cc
@@ -31,6 +31,8 @@
#include "base/bitfield.hh"
#include "dev/x86/i82094aa.hh"
#include "dev/x86/i8259.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
X86ISA::I8259::I8259(Params * p) : BasicPioDevice(p), IntDev(this),
latency(p->pio_latency), output(p->output),