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authorLisa Hsu <hsul@eecs.umich.edu>2005-10-09 18:20:54 -0400
committerLisa Hsu <hsul@eecs.umich.edu>2005-10-09 18:20:54 -0400
commit7b04cd9561dd591cb51c428816529ea8bb9c2acf (patch)
tree63f4b00ebfb9078eb7b2d5f8d20afaf859183b8b
parenta23ff5ac96782b1fc4dac8e6f21d90c1a2547e7a (diff)
downloadgem5-7b04cd9561dd591cb51c428816529ea8bb9c2acf.tar.xz
add a flag that supercedes all other InstExec flags to print a trace in the Intel sim compatible format.
--HG-- extra : convert_revision : 19569e5645f2d68fb68a0352753c08c2a24bfdc4
-rw-r--r--cpu/exetrace.cc124
-rw-r--r--cpu/exetrace.hh1
2 files changed, 70 insertions, 55 deletions
diff --git a/cpu/exetrace.cc b/cpu/exetrace.cc
index 9c5fdf3ba..8e200f1e0 100644
--- a/cpu/exetrace.cc
+++ b/cpu/exetrace.cc
@@ -51,81 +51,91 @@ using namespace std;
void
Trace::InstRecord::dump(ostream &outs)
{
+ if (flags[INTEL_FORMAT]) {
+ ccprintf(outs, "%7d ) ", cycle);
+ outs << "0x" << hex << PC << ":\t";
+ if (staticInst->isLoad()) {
+ outs << "<RD 0x" << hex << addr;
+ outs << ">";
+ } else if (staticInst->isStore()) {
+ outs << "<WR 0x" << hex << addr;
+ outs << ">";
+ }
+ } else {
+ if (flags[PRINT_CYCLE])
+ ccprintf(outs, "%7d: ", cycle);
- if (flags[PRINT_CYCLE])
- ccprintf(outs, "%7d: ", cycle);
-
- outs << cpu->name() << " ";
+ outs << cpu->name() << " ";
- if (flags[TRACE_MISSPEC])
- outs << (misspeculating ? "-" : "+") << " ";
+ if (flags[TRACE_MISSPEC])
+ outs << (misspeculating ? "-" : "+") << " ";
- if (flags[PRINT_THREAD_NUM])
- outs << "T" << thread << " : ";
+ if (flags[PRINT_THREAD_NUM])
+ outs << "T" << thread << " : ";
- std::string sym_str;
- Addr sym_addr;
- if (debugSymbolTable
- && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
- if (PC != sym_addr)
- sym_str += csprintf("+%d", PC - sym_addr);
- outs << "@" << sym_str << " : ";
- }
- else {
- outs << "0x" << hex << PC << " : ";
- }
+ std::string sym_str;
+ Addr sym_addr;
+ if (debugSymbolTable
+ && debugSymbolTable->findNearestSymbol(PC, sym_str, sym_addr)) {
+ if (PC != sym_addr)
+ sym_str += csprintf("+%d", PC - sym_addr);
+ outs << "@" << sym_str << " : ";
+ }
+ else {
+ outs << "0x" << hex << PC << " : ";
+ }
- //
- // Print decoded instruction
- //
+ //
+ // Print decoded instruction
+ //
#if defined(__GNUC__) && (__GNUC__ < 3)
- // There's a bug in gcc 2.x library that prevents setw()
- // from working properly on strings
- string mc(staticInst->disassemble(PC, debugSymbolTable));
- while (mc.length() < 26)
- mc += " ";
- outs << mc;
+ // There's a bug in gcc 2.x library that prevents setw()
+ // from working properly on strings
+ string mc(staticInst->disassemble(PC, debugSymbolTable));
+ while (mc.length() < 26)
+ mc += " ";
+ outs << mc;
#else
- outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
+ outs << setw(26) << left << staticInst->disassemble(PC, debugSymbolTable);
#endif
- outs << " : ";
+ outs << " : ";
- if (flags[PRINT_OP_CLASS]) {
- outs << opClassStrings[staticInst->opClass()] << " : ";
- }
+ if (flags[PRINT_OP_CLASS]) {
+ outs << opClassStrings[staticInst->opClass()] << " : ";
+ }
- if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
- outs << " D=";
+ if (flags[PRINT_RESULT_DATA] && data_status != DataInvalid) {
+ outs << " D=";
#if 0
- if (data_status == DataDouble)
- ccprintf(outs, "%f", data.as_double);
- else
- ccprintf(outs, "%#018x", data.as_int);
+ if (data_status == DataDouble)
+ ccprintf(outs, "%f", data.as_double);
+ else
+ ccprintf(outs, "%#018x", data.as_int);
#else
- ccprintf(outs, "%#018x", data.as_int);
+ ccprintf(outs, "%#018x", data.as_int);
#endif
- }
+ }
- if (flags[PRINT_EFF_ADDR] && addr_valid)
- outs << " A=0x" << hex << addr;
+ if (flags[PRINT_EFF_ADDR] && addr_valid)
+ outs << " A=0x" << hex << addr;
- if (flags[PRINT_INT_REGS] && regs_valid) {
- for (int i = 0; i < 32;)
- for (int j = i + 1; i <= j; i++)
- ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
- ((i == j) ? "\n" : " "));
- outs << "\n";
- }
-
- if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
- outs << " FetchSeq=" << dec << fetch_seq;
+ if (flags[PRINT_INT_REGS] && regs_valid) {
+ for (int i = 0; i < 32;)
+ for (int j = i + 1; i <= j; i++)
+ ccprintf(outs, "r%02d = %#018x%s", i, iregs->regs[i],
+ ((i == j) ? "\n" : " "));
+ outs << "\n";
+ }
- if (flags[PRINT_CP_SEQ] && cp_seq_valid)
- outs << " CPSeq=" << dec << cp_seq;
+ if (flags[PRINT_FETCH_SEQ] && fetch_seq_valid)
+ outs << " FetchSeq=" << dec << fetch_seq;
+ if (flags[PRINT_CP_SEQ] && cp_seq_valid)
+ outs << " CPSeq=" << dec << cp_seq;
+ }
//
// End of line...
//
@@ -172,6 +182,9 @@ Param<bool> exe_trace_print_fetchseq(&exeTraceParams, "print_fetchseq",
"print fetch sequence number", false);
Param<bool> exe_trace_print_cp_seq(&exeTraceParams, "print_cpseq",
"print correct-path sequence number", false);
+Param<bool> exe_trace_intel_format(&exeTraceParams, "intel_format",
+ "print trace in intel compatible format", false);
+
//
// Helper function for ExecutionTraceParamContext::checkParams() just
@@ -190,6 +203,7 @@ Trace::InstRecord::setParams()
flags[PRINT_INT_REGS] = exe_trace_print_iregs;
flags[PRINT_FETCH_SEQ] = exe_trace_print_fetchseq;
flags[PRINT_CP_SEQ] = exe_trace_print_cp_seq;
+ flags[INTEL_FORMAT] = exe_trace_intel_format;
}
void
diff --git a/cpu/exetrace.hh b/cpu/exetrace.hh
index 1eda3a934..1515869ad 100644
--- a/cpu/exetrace.hh
+++ b/cpu/exetrace.hh
@@ -143,6 +143,7 @@ class InstRecord : public Record
PRINT_INT_REGS,
PRINT_FETCH_SEQ,
PRINT_CP_SEQ,
+ INTEL_FORMAT,
NUM_BITS
};