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authorAli Saidi <saidi@eecs.umich.edu>2006-08-15 17:41:22 -0400
committerAli Saidi <saidi@eecs.umich.edu>2006-08-15 17:41:22 -0400
commited58f77c473cf6f35a17ba1448a12dbca089987d (patch)
tree00b9ecfc881086d1ceaa5e62073b1bb979fa6837
parent07488510713a1df61f6cefced7677047cfc0ef66 (diff)
downloadgem5-ed58f77c473cf6f35a17ba1448a12dbca089987d.tar.xz
fixes for gcc 4.1
Nate needs to fix sinic builder stuff Gabe needs to verify my fixes to decoder.isa OPT/DEBUG compiles for ALPHA_FS, ALPHA_SE, MIPS_SE, SPARC_SE with this changeset README: Fix the swig version in the readme src/SConscript: remove sinic until nate fixes the builder crap for it src/arch/alpha/system.hh: src/arch/mips/isa/includes.isa: src/arch/sparc/isa/decoder.isa: src/base/stats/visit.cc: src/base/timebuf.hh: src/dev/ide_disk.cc: src/dev/sinic.cc: src/mem/cache/miss/mshr.cc: src/mem/cache/miss/mshr_queue.cc: src/mem/packet.hh: src/mem/request.hh: src/sim/builder.hh: src/sim/system.hh: fixes for gcc 4.1 --HG-- extra : convert_revision : 3775427c0047b282574d4831dd602c96cac3ba17
-rw-r--r--README2
-rw-r--r--src/SConscript2
-rw-r--r--src/arch/alpha/system.hh4
-rw-r--r--src/arch/mips/isa/includes.isa1
-rw-r--r--src/arch/sparc/isa/decoder.isa8
-rw-r--r--src/base/stats/visit.cc2
-rw-r--r--src/base/timebuf.hh1
-rw-r--r--src/dev/ide_disk.cc2
-rw-r--r--src/dev/sinic.cc35
-rw-r--r--src/mem/cache/miss/mshr.cc4
-rw-r--r--src/mem/cache/miss/mshr_queue.cc4
-rw-r--r--src/mem/packet.hh1
-rw-r--r--src/mem/request.hh2
-rw-r--r--src/sim/builder.hh40
-rw-r--r--src/sim/system.hh4
15 files changed, 77 insertions, 35 deletions
diff --git a/README b/README
index 37387f27e..35b33cdd8 100644
--- a/README
+++ b/README
@@ -12,7 +12,7 @@ Short version:
1. If you don't have SCons version 0.96.91 or newer, get it from
http://wwww.scons.org.
-2. If you don't have SWIG version 0.96.91 or newer, get it from
+2. If you don't have SWIG version 1.3.28 or newer, get it from
http://wwww.swig.org.
3. In this directory, type 'scons build/ALPHA_SE/tests/debug/quick'. This
diff --git a/src/SConscript b/src/SConscript
index 812089a00..f14ba490c 100644
--- a/src/SConscript
+++ b/src/SConscript
@@ -230,7 +230,6 @@ full_system_sources = Split('''
dev/platform.cc
dev/simconsole.cc
dev/simple_disk.cc
- dev/sinic.cc
dev/tsunami.cc
dev/tsunami_cchip.cc
dev/tsunami_io.cc
@@ -250,6 +249,7 @@ full_system_sources = Split('''
sim/pseudo_inst.cc
''')
+ #dev/sinic.cc
if env['TARGET_ISA'] == 'alpha':
diff --git a/src/arch/alpha/system.hh b/src/arch/alpha/system.hh
index 0f4f64581..0c073a68c 100644
--- a/src/arch/alpha/system.hh
+++ b/src/arch/alpha/system.hh
@@ -91,14 +91,14 @@ class AlphaSystem : public System
/** Add a function-based event to PALcode. */
template <class T>
- T *AlphaSystem::addPalFuncEvent(const char *lbl)
+ T *addPalFuncEvent(const char *lbl)
{
return addFuncEvent<T>(palSymtab, lbl);
}
/** Add a function-based event to the console code. */
template <class T>
- T *AlphaSystem::addConsoleFuncEvent(const char *lbl)
+ T *addConsoleFuncEvent(const char *lbl)
{
return addFuncEvent<T>(consoleSymtab, lbl);
}
diff --git a/src/arch/mips/isa/includes.isa b/src/arch/mips/isa/includes.isa
index 6b5f3c588..f58c8adaa 100644
--- a/src/arch/mips/isa/includes.isa
+++ b/src/arch/mips/isa/includes.isa
@@ -75,6 +75,7 @@ output exec {{
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "sim/sim_exit.hh"
+#include "mem/packet_impl.hh"
using namespace MipsISA;
}};
diff --git a/src/arch/sparc/isa/decoder.isa b/src/arch/sparc/isa/decoder.isa
index 0c2729833..25203f45c 100644
--- a/src/arch/sparc/isa/decoder.isa
+++ b/src/arch/sparc/isa/decoder.isa
@@ -220,7 +220,7 @@ decode OP default Unknown::unknown()
,{{0}},{{0}},{{0}},{{0}});
0x1E: udivcc({{
uint32_t resTemp, val2 = Rs2_or_imm13.udw;
- int32_t overflow;
+ int32_t overflow = 0;
if(val2 == 0) fault = new DivisionByZero;
else
{
@@ -236,7 +236,7 @@ decode OP default Unknown::unknown()
);
0x1F: sdivcc({{
int32_t resTemp, val2 = Rs2_or_imm13.sdw;
- int32_t overflow, underflow;
+ int32_t overflow = 0, underflow = 0;
if(val2 == 0) fault = new DivisionByZero;
else
{
@@ -244,7 +244,7 @@ decode OP default Unknown::unknown()
overflow = (resTemp<63:31> != 0);
underflow = (resTemp<63:> && resTemp<62:31> != 0xFFFFFFFF);
if(overflow) Rd = resTemp = 0x7FFFFFFF;
- else if(underflow) Rd = resTemp = 0xFFFFFFFF80000000ULL;
+ else if(underflow) resTemp = Rd = 0xFFFFFFFF80000000ULL;
else Rd = resTemp;
} }},
{{0}},
@@ -272,7 +272,7 @@ decode OP default Unknown::unknown()
);
0x22: taddcctv({{
int64_t resTemp, val2 = Rs2_or_imm13;
- Rd = Rs1 + val2;
+ Rd = resTemp = Rs1 + val2;
int32_t overflow = Rs1<1:0> || val2<1:0> ||
(Rs1<31:> == val2<31:> && val2<31:> != Rd<31:>);
if(overflow) fault = new TagOverflow;}},
diff --git a/src/base/stats/visit.cc b/src/base/stats/visit.cc
index 870e4fb77..6680eaa09 100644
--- a/src/base/stats/visit.cc
+++ b/src/base/stats/visit.cc
@@ -31,7 +31,6 @@
#include "base/stats/visit.hh"
namespace Stats {
-namespace Detail {
Visit::Visit()
{}
@@ -39,5 +38,4 @@ Visit::Visit()
Visit::~Visit()
{}
-/* namespace Detail */ }
/* namespace Stats */ }
diff --git a/src/base/timebuf.hh b/src/base/timebuf.hh
index a484a3179..1d0de8278 100644
--- a/src/base/timebuf.hh
+++ b/src/base/timebuf.hh
@@ -32,6 +32,7 @@
#ifndef __BASE_TIMEBUF_HH__
#define __BASE_TIMEBUF_HH__
+#include <cassert>
#include <vector>
template <class T>
diff --git a/src/dev/ide_disk.cc b/src/dev/ide_disk.cc
index 12564ddd0..5d3346b1e 100644
--- a/src/dev/ide_disk.cc
+++ b/src/dev/ide_disk.cc
@@ -110,7 +110,7 @@ IdeDisk::IdeDisk(const string &name, DiskImage *img,
// Number of sectors on disk
driveID.atap_capacity = lba_size;
// Multiword DMA mode 2 and below supported
- driveID.atap_dmamode_supp = 0x400;
+ driveID.atap_dmamode_supp = 0x4;
// Set PIO mode 4 and 3 supported
driveID.atap_piomode_supp = 0x3;
// Set DMA mode 4 and below supported
diff --git a/src/dev/sinic.cc b/src/dev/sinic.cc
index 40bf29c87..61fb3aa24 100644
--- a/src/dev/sinic.cc
+++ b/src/dev/sinic.cc
@@ -1598,24 +1598,24 @@ Device::unserialize(Checkpoint *cp, const std::string &section)
}
+/* namespace Sinic */ }
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(Interface)
+BEGIN_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
SimObjectParam<EtherInt *> peer;
- SimObjectParam<Device *> device;
-
-END_DECLARE_SIM_OBJECT_PARAMS(Interface)
+ SimObjectParam<Sinic::Device *> device;
+END_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
-BEGIN_INIT_SIM_OBJECT_PARAMS(Interface)
+BEGIN_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
INIT_PARAM_DFLT(peer, "peer interface", NULL),
INIT_PARAM(device, "Ethernet device of this interface")
-END_INIT_SIM_OBJECT_PARAMS(Interface)
+END_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicInterface)
-CREATE_SIM_OBJECT(Interface)
+CREATE_SIM_OBJECT_WNS(Sinic, SinicInterface)
{
- Interface *dev_int = new Interface(getInstanceName(), device);
+ Sinic::Interface *dev_int = new Sinic::Interface(getInstanceName(), device);
EtherInt *p = (EtherInt *)peer;
if (p) {
@@ -1626,10 +1626,10 @@ CREATE_SIM_OBJECT(Interface)
return dev_int;
}
-REGISTER_SIM_OBJECT("SinicInt", Interface)
+REGISTER_SIM_OBJECT_WNS(Sinic, "SinicInt", SinicInterface)
-BEGIN_DECLARE_SIM_OBJECT_PARAMS(Device)
+BEGIN_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
SimObjectParam<System *> system;
@@ -1670,9 +1670,9 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(Device)
Param<bool> delay_copy;
Param<bool> virtual_addr;
-END_DECLARE_SIM_OBJECT_PARAMS(Device)
+END_DECLARE_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
-BEGIN_INIT_SIM_OBJECT_PARAMS(Device)
+BEGIN_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
INIT_PARAM(system, "System pointer"),
@@ -1713,12 +1713,12 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(Device)
INIT_PARAM(delay_copy, ""),
INIT_PARAM(virtual_addr, "")
-END_INIT_SIM_OBJECT_PARAMS(Device)
+END_INIT_SIM_OBJECT_PARAMS_WNS(Sinic, SinicDevice)
-CREATE_SIM_OBJECT(Device)
+CREATE_SIM_OBJECT_WNS(Sinic, SinicDevice)
{
- Device::Params *params = new Device::Params;
+ Sinic::Sinic::Device::Params *params = new Device::Params;
params->name = getInstanceName();
params->platform = platform;
params->system = system;
@@ -1758,9 +1758,8 @@ CREATE_SIM_OBJECT(Device)
params->delay_copy = delay_copy;
params->virtual_addr = virtual_addr;
- return new Device(params);
+ return new Sinic::Device(params);
}
-REGISTER_SIM_OBJECT("Sinic", Device)
+REGISTER_SIM_OBJECT_WNS(Sinic, "Sinic", SinicDevice)
-/* namespace Sinic */ }
diff --git a/src/mem/cache/miss/mshr.cc b/src/mem/cache/miss/mshr.cc
index db2f40c56..d073c0fea 100644
--- a/src/mem/cache/miss/mshr.cc
+++ b/src/mem/cache/miss/mshr.cc
@@ -103,8 +103,8 @@ MSHR::deallocate()
assert(ntargets == 0);
pkt = NULL;
inService = false;
- allocIter = NULL;
- readyIter = NULL;
+ //allocIter = NULL;
+ //readyIter = NULL;
}
/*
diff --git a/src/mem/cache/miss/mshr_queue.cc b/src/mem/cache/miss/mshr_queue.cc
index 6516a99f8..ffb486c64 100644
--- a/src/mem/cache/miss/mshr_queue.cc
+++ b/src/mem/cache/miss/mshr_queue.cc
@@ -219,7 +219,7 @@ MSHRQueue::markInService(MSHR* mshr)
}
mshr->inService = true;
pendingList.erase(mshr->readyIter);
- mshr->readyIter = NULL;
+ //mshr->readyIter = NULL;
inServiceMSHRs += 1;
//pendingList.pop_front();
}
@@ -227,7 +227,7 @@ MSHRQueue::markInService(MSHR* mshr)
void
MSHRQueue::markPending(MSHR* mshr, Packet::Command cmd)
{
- assert(mshr->readyIter == NULL);
+ //assert(mshr->readyIter == NULL);
mshr->pkt->cmd = cmd;
mshr->pkt->flags &= ~SATISFIED;
mshr->inService = false;
diff --git a/src/mem/packet.hh b/src/mem/packet.hh
index 83b4006e2..9e961b0dc 100644
--- a/src/mem/packet.hh
+++ b/src/mem/packet.hh
@@ -42,6 +42,7 @@
#include "sim/host.hh"
#include "sim/root.hh"
#include <list>
+#include <cassert>
struct Packet;
typedef Packet* PacketPtr;
diff --git a/src/mem/request.hh b/src/mem/request.hh
index 457310298..6acd7526c 100644
--- a/src/mem/request.hh
+++ b/src/mem/request.hh
@@ -42,6 +42,8 @@
#include "sim/host.hh"
#include "sim/root.hh"
+#include <cassert>
+
class Request;
typedef Request* RequestPtr;
diff --git a/src/sim/builder.hh b/src/sim/builder.hh
index 2997fe5c3..aa0e3d17c 100644
--- a/src/sim/builder.hh
+++ b/src/sim/builder.hh
@@ -179,5 +179,45 @@ SimObjectClass the##OBJ_CLASS##Class(CLASS_NAME, \
/* see param.hh */ \
DEFINE_SIM_OBJECT_CLASS_NAME(CLASS_NAME, OBJ_CLASS)
+/* Macros that use the namespace for sinic... yuk. */
+#define BEGIN_DECLARE_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
+class NAME_SPACE##OBJ_CLASS##Builder : public SimObjectBuilder \
+{ \
+ public:
+
+#define END_DECLARE_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
+ \
+ NAME_SPACE##OBJ_CLASS##Builder(const std::string &iniSection); \
+ virtual ~NAME_SPACE##OBJ_CLASS##Builder() {} \
+ \
+ NAME_SPACE::OBJ_CLASS *create(); \
+};
+
+#define BEGIN_INIT_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
+ NAME_SPACE::OBJ_CLASS##Builder::OBJ_CLASS##Builder(const std::string &iSec) \
+ : SimObjectBuilder(iSec),
+
+
+#define END_INIT_SIM_OBJECT_PARAMS_WNS(NAME_SPACE, OBJ_CLASS) \
+{ \
+}
+
+#define CREATE_SIM_OBJECT_WNS(NAME_SPACE, OBJ_CLASS) \
+NAME_SPACE::OBJ_CLASS *NAME_SPACE##OBJ_CLASS##Builder::create()
+
+#define REGISTER_SIM_OBJECT_WNS(NAME_SPACE, CLASS_NAME, OBJ_CLASS) \
+SimObjectBuilder * \
+new##NAME_SPACEi##OBJ_CLASS##Builder(const std::string &iniSection) \
+{ \
+ return new NAME_SPACE##OBJ_CLASS##Builder(iniSection); \
+} \
+ \
+SimObjectClass the##NAME_SPACE##OBJ_CLASS##Class(CLASS_NAME, \
+ new##NAME_SPACE##OBJ_CLASS##Builder); \
+ \
+/* see param.hh */ \
+DEFINE_SIM_OBJECT_CLASS_NAME(CLASS_NAME, NAME_SPACE##OBJ_CLASS)
+
+
#endif // __BUILDER_HH__
diff --git a/src/sim/system.hh b/src/sim/system.hh
index c138d2ee4..11f4f0c90 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -141,7 +141,7 @@ class System : public SimObject
* up in the specified symbol table.
*/
template <class T>
- T *System::addFuncEvent(SymbolTable *symtab, const char *lbl)
+ T *addFuncEvent(SymbolTable *symtab, const char *lbl)
{
Addr addr = 0; // initialize only to avoid compiler warning
@@ -155,7 +155,7 @@ class System : public SimObject
/** Add a function-based event to kernel code. */
template <class T>
- T *System::addKernelFuncEvent(const char *lbl)
+ T *addKernelFuncEvent(const char *lbl)
{
return addFuncEvent<T>(kernelSymtab, lbl);
}