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authorAli Saidi <saidi@eecs.umich.edu>2004-08-31 23:47:57 -0400
committerAli Saidi <saidi@eecs.umich.edu>2004-08-31 23:47:57 -0400
commit23e0643c6918fe6dd8211d96eb791e69408479b9 (patch)
treeffa81ef221b6b4c1652fe7395a562af9c39174a0
parent0b0a6778c96c3ac3e3f979d655de0ae595232507 (diff)
downloadgem5-23e0643c6918fe6dd8211d96eb791e69408479b9.tar.xz
Updates to make SMP work.
dev/tsunami_cchip.cc: updates to ipi handling chipset code sim/system.cc: debugSymbolTable, now has symbols from pal, console, and linux --HG-- extra : convert_revision : c981d857f7e3d75f4c46172809e6d14e5f0a1238
-rw-r--r--dev/tsunami_cchip.cc81
-rw-r--r--sim/system.cc19
2 files changed, 64 insertions, 36 deletions
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index 870924a2f..b43bb13bd 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -185,6 +185,48 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
panic("TSDEV_CC_MTR write not implemented\n");
return No_Fault;
case TSDEV_CC_MISC:
+ uint64_t ipreq;
+ ipreq = (*(uint64_t*)data >> 12) & 0xF;
+ //If it is bit 12-15, this is an IPI post
+ if (ipreq) {
+ for (int cpunum=0; cpunum < Tsunami::Max_CPUs; cpunum++) {
+ // Check each cpu bit
+ if (ipreq & (1 << cpunum)) {
+ // Check if there is already an ipi (bits 8:11)
+ if (!(misc & (0x100 << cpunum))) {
+ misc |= (0x100 << cpunum);
+ tsunami->intrctrl->post(cpunum,
+ TheISA::INTLEVEL_IRQ3, 0);
+ DPRINTF(IPI, "send IPI cpu=%d from=%d\n",
+ cpunum, req->cpu_num);
+ }
+ }
+ }
+ supportedWrite = true;
+ }
+
+ //If it is bit 8-11, this is an IPI clear
+ uint64_t ipintr;
+ ipintr = (*(uint64_t*)data >> 8) & 0xF;
+ if (ipintr) {
+ for (int cpunum=0; cpunum < Tsunami::Max_CPUs; cpunum++) {
+ // Check each cpu bit
+ if (ipintr & (1 << cpunum)) {
+ // Check if there is a pending ipi (bits 8:11)
+ if (misc & (0x100 << cpunum)) {
+ misc &= ~(0x100 << cpunum);
+ tsunami->intrctrl->clear(cpunum,
+ TheISA::INTLEVEL_IRQ3, 0);
+ DPRINTF(IPI, "clear IPI IPI cpu=%d from=%d\n",
+ cpunum, req->cpu_num);
+ }
+ }
+ }
+ supportedWrite = true;
+ }
+
+
+
//If it is the 4-7th bit, clear the RTC interrupt
uint64_t itintr;
if ((itintr = (*(uint64_t*) data) & (0xf<<4))) {
@@ -199,43 +241,14 @@ TsunamiCChip::write(MemReqPtr &req, const uint8_t *data)
}
supportedWrite = true;
}
- //If it is 12th-15th bit, IPI sent to Processor 1
- uint64_t ipreq;
- if ((ipreq = (*(uint64_t*) data) & (0xf << 12))) {
- //Set the bits in IPINTR
- misc |= (ipreq >> 4);
- for (int i=0; i < size; i++) {
- if ((ipreq & (1 << (i + 12)))) {
- if (!ipiInterrupting[i])
- tsunami->intrctrl->post(i, TheISA::INTLEVEL_IRQ3, 0);
- ipiInterrupting[i]++;
- DPRINTF(IPI, "send cpu=%d pending=%d from=%d\n", i,
- ipiInterrupting[i], req->cpu_num);
- }
- }
- supportedWrite = true;
- }
- //If it is bits 8-11, then clearing IPI's
- uint64_t ipintr;
- if ((ipintr = (*(uint64_t*) data) & (0xf << 8))) {
- //Clear the bits in IPINTR
- misc &= ~(ipintr);
- for (int i=0; i < size; i++) {
- if ((ipintr & (1 << (i + 8))) && ipiInterrupting[i]) {
- if (!(--ipiInterrupting[i]))
- tsunami->intrctrl->clear(i, TheISA::INTLEVEL_IRQ3, 0);
- DPRINTF(IPI, "clearing cpu=%d pending=%d from=%d\n", i,
- ipiInterrupting[i] + 1, req->cpu_num);
- }
- }
+
+ // ignore NXMs
+ if (*(uint64_t*)data & 0x10000000)
supportedWrite = true;
- }
- // ignore NXMs
- if (*(uint64_t*)data & 0x10000000)
- supportedWrite = true;
+ if(!supportedWrite)
+ panic("TSDEV_CC_MISC write not implemented\n");
- if(!supportedWrite) panic("TSDEV_CC_MISC write not implemented\n");
return No_Fault;
case TSDEV_CC_AAR0:
case TSDEV_CC_AAR1:
diff --git a/sim/system.cc b/sim/system.cc
index 2d91e187b..de988f8d7 100644
--- a/sim/system.cc
+++ b/sim/system.cc
@@ -55,7 +55,7 @@ System::System(Params *p)
kernelSymtab = new SymbolTable;
consoleSymtab = new SymbolTable;
- debugSymbolTable = kernelSymtab;
+ debugSymbolTable = new SymbolTable;
/**
* Load the kernel, pal, and console code into memory
@@ -89,7 +89,6 @@ System::System(Params *p)
// load symbols
if (!kernel->loadGlobalSymbols(kernelSymtab))
panic("could not load kernel symbols\n");
- debugSymbolTable = kernelSymtab;
if (!kernel->loadLocalSymbols(kernelSymtab))
panic("could not load kernel local symbols\n");
@@ -97,6 +96,22 @@ System::System(Params *p)
if (!console->loadGlobalSymbols(consoleSymtab))
panic("could not load console symbols\n");
+ if (!kernel->loadGlobalSymbols(debugSymbolTable))
+ panic("could not load kernel symbols\n");
+
+ if (!kernel->loadLocalSymbols(debugSymbolTable))
+ panic("could not load kernel local symbols\n");
+
+ if (!console->loadGlobalSymbols(debugSymbolTable))
+ panic("could not load console symbols\n");
+
+ if (!pal->loadGlobalSymbols(debugSymbolTable))
+ panic("could not load pal symbols\n");
+
+ if (!pal->loadLocalSymbols(debugSymbolTable))
+ panic("could not load pal symbols\n");
+
+
DPRINTF(Loader, "Kernel start = %#x\n", kernelStart);
DPRINTF(Loader, "Kernel end = %#x\n", kernelEnd);
DPRINTF(Loader, "Kernel entry = %#x\n", kernelEntry);