cpu: add separate stats for insts/ops both globally and per cpu model

15 files changed, 172 insertions, 38 deletions

diff --git a/src/arch/noisa/cpu_dummy.hh b/src/arch/noisa/cpu_dummy.hh
index 2b83f5e5d..0d494d6a5 100644
--- a/src/arch/noisa/cpu_dummy.hh
+++ b/src/arch/noisa/cpu_dummy.hh
@@ -2,5 +2,6 @@
 class BaseCPU
 {
   public:
-    static int numSimulatedInstructions() { return 0; }
+    static int numSimulatedInsts() { return 0; }
+    static int numSimulatedOps() { return 0; }
 };
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index d8585567d..276995da2 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -93,7 +93,7 @@ CPUProgressEvent::CPUProgressEvent(BaseCPU *_cpu, Tick ival)
 void
 CPUProgressEvent::process()
 {
-    Counter temp = cpu->totalInstructions();
+    Counter temp = cpu->totalOps();
 #ifndef NDEBUG
     double ipc = double(temp - lastNumInst) / (_interval / cpu->ticks(1));
 
diff --git a/src/cpu/base.hh b/src/cpu/base.hh
index 93e5476ef..74c1a8762 100644
--- a/src/cpu/base.hh
+++ b/src/cpu/base.hh
@@ -331,7 +331,9 @@ class BaseCPU : public MemObject
      */
     virtual BranchPred *getBranchPred() { return NULL; };
 
-    virtual Counter totalInstructions() const = 0;
+    virtual Counter totalInsts() const = 0;
+
+    virtual Counter totalOps() const = 0;
 
     // Function tracing
   private:
@@ -354,13 +356,24 @@ class BaseCPU : public MemObject
     }
 
     static int numSimulatedCPUs() { return cpuList.size(); }
-    static Counter numSimulatedInstructions()
+    static Counter numSimulatedInsts()
+    {
+        Counter total = 0;
+
+        int size = cpuList.size();
+        for (int i = 0; i < size; ++i)
+            total += cpuList[i]->totalInsts();
+
+        return total;
+    }
+
+    static Counter numSimulatedOps()
     {
         Counter total = 0;
 
         int size = cpuList.size();
         for (int i = 0; i < size; ++i)
-            total += cpuList[i]->totalInstructions();
+            total += cpuList[i]->totalOps();
 
         return total;
     }
diff --git a/src/cpu/inorder/cpu.cc b/src/cpu/inorder/cpu.cc
index 62d48e89e..51d3cbe2f 100644
--- a/src/cpu/inorder/cpu.cc
+++ b/src/cpu/inorder/cpu.cc
@@ -634,16 +634,21 @@ InOrderCPU::regStats()
     committedInsts
         .init(numThreads)
         .name(name() + ".committedInsts")
-        .desc("Number of Instructions Simulated (Per-Thread)");
+        .desc("Number of Instructions committed (Per-Thread)");
+
+    committedOps
+        .init(numThreads)
+        .name(name() + ".committedOps")
+        .desc("Number of Ops committed (Per-Thread)");
 
     smtCommittedInsts
         .init(numThreads)
         .name(name() + ".smtCommittedInsts")
-        .desc("Number of SMT Instructions Simulated (Per-Thread)");
+        .desc("Number of SMT Instructions committed (Per-Thread)");
 
     totalCommittedInsts
         .name(name() + ".committedInsts_total")
-        .desc("Number of Instructions Simulated (Total)");
+        .desc("Number of Instructions committed (Total)");
 
     cpi
         .name(name() + ".cpi")
@@ -1437,19 +1442,26 @@ InOrderCPU::instDone(DynInstPtr inst, ThreadID tid)
     
     // Increment thread-state's instruction count
     thread[tid]->numInst++;
+    thread[tid]->numOp++;
 
     // Increment thread-state's instruction stats
     thread[tid]->numInsts++;
+    thread[tid]->numOps++;
 
     // Count committed insts per thread stats
-    committedInsts[tid]++;
+    if (!inst->isMicroop() || inst->isLastMicroop()) {
+        committedInsts[tid]++;
+
+        // Count total insts committed stat
+        totalCommittedInsts++;
+    }
 
-    // Count total insts committed stat
-    totalCommittedInsts++;
+    committedOps[tid]++;
 
     // Count SMT-committed insts per thread stat
     if (numActiveThreads() > 1) {
-        smtCommittedInsts[tid]++;
+        if (!inst->isMicroop() || inst->isLastMicroop())
+            smtCommittedInsts[tid]++;
     }
 
     // Instruction-Mix Stats
@@ -1470,7 +1482,7 @@ InOrderCPU::instDone(DynInstPtr inst, ThreadID tid)
     }
 
     // Check for instruction-count-based events.
-    comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
+    comInstEventQueue[tid]->serviceEvents(thread[tid]->numOp);
 
     // Finally, remove instruction from CPU
     removeInst(inst);
diff --git a/src/cpu/inorder/cpu.hh b/src/cpu/inorder/cpu.hh
index 4abcb05b4..5e336fd5a 100644
--- a/src/cpu/inorder/cpu.hh
+++ b/src/cpu/inorder/cpu.hh
@@ -765,7 +765,7 @@ class InOrderCPU : public BaseCPU
     }
 
     /** Count the Total Instructions Committed in the CPU. */
-    virtual Counter totalInstructions() const
+    virtual Counter totalInsts() const
     {
         Counter total(0);
 
@@ -775,6 +775,17 @@ class InOrderCPU : public BaseCPU
         return total;
     }
 
+    /** Count the Total Ops Committed in the CPU. */
+    virtual Counter totalOps() const
+    {
+        Counter total(0);
+
+        for (ThreadID tid = 0; tid < (ThreadID)thread.size(); tid++)
+            total += thread[tid]->numOp;
+
+        return total;
+    }
+
     /** Pointer to the system. */
     System *system;
 
@@ -855,6 +866,9 @@ class InOrderCPU : public BaseCPU
     /** Stat for the number of committed instructions per thread. */
     Stats::Vector committedInsts;
 
+    /** Stat for the number of committed ops per thread. */
+    Stats::Vector committedOps;
+
     /** Stat for the number of committed instructions per thread. */
     Stats::Vector smtCommittedInsts;
 
diff --git a/src/cpu/inorder/inorder_dyn_inst.hh b/src/cpu/inorder/inorder_dyn_inst.hh
index d61a42480..48620475a 100644
--- a/src/cpu/inorder/inorder_dyn_inst.hh
+++ b/src/cpu/inorder/inorder_dyn_inst.hh
@@ -398,6 +398,8 @@ class InOrderDynInst : public FastAlloc, public RefCounted
     bool isUnverifiable() const { return staticInst->isUnverifiable(); }
     bool isSyscall() const
     { return staticInst->isSyscall(); }
+    bool isMicroop() const { return staticInst->isMicroop(); }
+    bool isLastMicroop() const { return staticInst->isLastMicroop(); }
 
 
     /////////////////////////////////////////////
diff --git a/src/cpu/o3/commit.hh b/src/cpu/o3/commit.hh
index 094518655..b5539c702 100644
--- a/src/cpu/o3/commit.hh
+++ b/src/cpu/o3/commit.hh
@@ -449,6 +449,8 @@ class DefaultCommit
 
     /** Stat for the total number of committed instructions. */
     Stats::Scalar commitCommittedInsts;
+    /** Stat for the total number of committed ops. */
+    Stats::Scalar commitCommittedOps;
     /** Stat for the total number of squashed instructions discarded by commit.
      */
     Stats::Scalar commitSquashedInsts;
@@ -466,7 +468,9 @@ class DefaultCommit
     Stats::Distribution numCommittedDist;
 
     /** Total number of instructions committed. */
-    Stats::Vector statComInst;
+    Stats::Vector instsCommitted;
+    /** Total number of ops (including micro ops) committed. */
+    Stats::Vector opsCommitted;
     /** Total number of software prefetches committed. */
     Stats::Vector statComSwp;
     /** Stat for the total number of committed memory references. */
diff --git a/src/cpu/o3/commit_impl.hh b/src/cpu/o3/commit_impl.hh
index 446c8e6f3..7ca42ae5b 100644
--- a/src/cpu/o3/commit_impl.hh
+++ b/src/cpu/o3/commit_impl.hh
@@ -169,6 +169,10 @@ DefaultCommit<Impl>::regStats()
         .name(name() + ".commitCommittedInsts")
         .desc("The number of committed instructions")
         .prereq(commitCommittedInsts);
+    commitCommittedOps
+        .name(name() + ".commitCommittedOps")
+        .desc("The number of committed instructions")
+        .prereq(commitCommittedInsts);
     commitSquashedInsts
         .name(name() + ".commitSquashedInsts")
         .desc("The number of squashed insts skipped by commit")
@@ -193,13 +197,20 @@ DefaultCommit<Impl>::regStats()
         .flags(Stats::pdf)
         ;
 
-    statComInst
+    instsCommitted
         .init(cpu->numThreads)
-        .name(name() + ".count")
+        .name(name() + ".committedInsts")
         .desc("Number of instructions committed")
         .flags(total)
         ;
 
+    opsCommitted
+        .init(cpu->numThreads)
+        .name(name() + ".committedOps")
+        .desc("Number of ops (including micro ops) committed")
+        .flags(total)
+        ;
+
     statComSwp
         .init(cpu->numThreads)
         .name(name() + ".swp_count")
@@ -988,12 +999,14 @@ DefaultCommit<Impl>::commitInsts()
                 // Set the doneSeqNum to the youngest committed instruction.
                 toIEW->commitInfo[tid].doneSeqNum = head_inst->seqNum;
 
-                ++commitCommittedInsts;
+                if (!head_inst->isMicroop() || head_inst->isLastMicroop())
+                    ++commitCommittedInsts;
+                ++commitCommittedOps;
 
                 // To match the old model, don't count nops and instruction
                 // prefetches towards the total commit count.
                 if (!head_inst->isNop() && !head_inst->isInstPrefetch()) {
-                    cpu->instDone(tid);
+                    cpu->instDone(tid, head_inst);
                 }
 
                 if (tid == 0) {
@@ -1175,7 +1188,7 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
         if (head_inst->traceData) {
             if (DTRACE(ExecFaulting)) {
                 head_inst->traceData->setFetchSeq(head_inst->seqNum);
-                head_inst->traceData->setCPSeq(thread[tid]->numInst);
+                head_inst->traceData->setCPSeq(thread[tid]->numOp);
                 head_inst->traceData->dump();
             }
             delete head_inst->traceData;
@@ -1209,7 +1222,7 @@ DefaultCommit<Impl>::commitHead(DynInstPtr &head_inst, unsigned inst_num)
             head_inst->seqNum, head_inst->pcState());
     if (head_inst->traceData) {
         head_inst->traceData->setFetchSeq(head_inst->seqNum);
-        head_inst->traceData->setCPSeq(thread[tid]->numInst);
+        head_inst->traceData->setCPSeq(thread[tid]->numOp);
         head_inst->traceData->dump();
         delete head_inst->traceData;
         head_inst->traceData = NULL;
@@ -1360,10 +1373,14 @@ DefaultCommit<Impl>::updateComInstStats(DynInstPtr &inst)
     if (inst->isDataPrefetch()) {
         statComSwp[tid]++;
     } else {
-        statComInst[tid]++;
+        if (!inst->isMicroop() || inst->isLastMicroop())
+            instsCommitted[tid]++;
+        opsCommitted[tid]++;
     }
 #else
-    statComInst[tid]++;
+    if (!inst->isMicroop() || inst->isLastMicroop())
+        instsCommitted[tid]++;
+    opsCommitted[tid]++;
 #endif
 
     //
diff --git a/src/cpu/o3/cpu.cc b/src/cpu/o3/cpu.cc
index d16270943..82f17adc9 100644
--- a/src/cpu/o3/cpu.cc
+++ b/src/cpu/o3/cpu.cc
@@ -506,6 +506,11 @@ FullO3CPU<Impl>::regStats()
         .name(name() + ".committedInsts")
         .desc("Number of Instructions Simulated");
 
+    committedOps
+        .init(numThreads)
+        .name(name() + ".committedOps")
+        .desc("Number of Ops (including micro ops) Simulated");
+
     totalCommittedInsts
         .name(name() + ".committedInsts_total")
         .desc("Number of Instructions Simulated");
@@ -718,7 +723,7 @@ FullO3CPU<Impl>::deactivateThread(ThreadID tid)
 
 template <class Impl>
 Counter
-FullO3CPU<Impl>::totalInstructions() const
+FullO3CPU<Impl>::totalInsts() const
 {
     Counter total(0);
 
@@ -730,6 +735,19 @@ FullO3CPU<Impl>::totalInstructions() const
 }
 
 template <class Impl>
+Counter
+FullO3CPU<Impl>::totalOps() const
+{
+    Counter total(0);
+
+    ThreadID size = thread.size();
+    for (ThreadID i = 0; i < size; i++)
+        total += thread[i]->numOp;
+
+    return total;
+}
+
+template <class Impl>
 void
 FullO3CPU<Impl>::activateContext(ThreadID tid, int delay)
 {
@@ -1458,13 +1476,19 @@ FullO3CPU<Impl>::addInst(DynInstPtr &inst)
 
 template <class Impl>
 void
-FullO3CPU<Impl>::instDone(ThreadID tid)
+FullO3CPU<Impl>::instDone(ThreadID tid, DynInstPtr &inst)
 {
     // Keep an instruction count.
-    thread[tid]->numInst++;
-    thread[tid]->numInsts++;
-    committedInsts[tid]++;
-    totalCommittedInsts++;
+    if (!inst->isMicroop() || inst->isLastMicroop()) {
+        thread[tid]->numInst++;
+        thread[tid]->numInsts++;
+        committedInsts[tid]++;
+        totalCommittedInsts++;
+    }
+    thread[tid]->numOp++;
+    thread[tid]->numOps++;
+    committedOps[tid]++;
+
     system->totalNumInsts++;
     // Check for instruction-count-based events.
     comInstEventQueue[tid]->serviceEvents(thread[tid]->numInst);
diff --git a/src/cpu/o3/cpu.hh b/src/cpu/o3/cpu.hh
index 94c0a873b..1c713097a 100644
--- a/src/cpu/o3/cpu.hh
+++ b/src/cpu/o3/cpu.hh
@@ -389,7 +389,10 @@ class FullO3CPU : public BaseO3CPU
     void removeThread(ThreadID tid);
 
     /** Count the Total Instructions Committed in the CPU. */
-    virtual Counter totalInstructions() const;
+    virtual Counter totalInsts() const;
+
+    /** Count the Total Ops (including micro ops) committed in the CPU. */
+    virtual Counter totalOps() const;
 
     /** Add Thread to Active Threads List. */
     void activateContext(ThreadID tid, int delay);
@@ -547,7 +550,7 @@ class FullO3CPU : public BaseO3CPU
     ListIt addInst(DynInstPtr &inst);
 
     /** Function to tell the CPU that an instruction has completed. */
-    void instDone(ThreadID tid);
+    void instDone(ThreadID tid, DynInstPtr &inst);
 
     /** Remove an instruction from the front end of the list.  There's
      *  no restriction on location of the instruction.
@@ -797,6 +800,8 @@ class FullO3CPU : public BaseO3CPU
     Stats::Scalar quiesceCycles;
     /** Stat for the number of committed instructions per thread. */
     Stats::Vector committedInsts;
+    /** Stat for the number of committed ops (including micro ops) per thread. */
+    Stats::Vector committedOps;
     /** Stat for the total number of committed instructions. */
     Stats::Scalar totalCommittedInsts;
     /** Stat for the CPI per thread. */
diff --git a/src/cpu/simple/base.cc b/src/cpu/simple/base.cc
index 9035ce973..eee28876d 100644
--- a/src/cpu/simple/base.cc
+++ b/src/cpu/simple/base.cc
@@ -116,6 +116,8 @@ BaseSimpleCPU::BaseSimpleCPU(BaseSimpleCPUParams *p)
 
     numInst = 0;
     startNumInst = 0;
+    numOp = 0;
+    startNumOp = 0;
     numLoad = 0;
     startNumLoad = 0;
     lastIcacheStall = 0;
@@ -156,8 +158,13 @@ BaseSimpleCPU::regStats()
     BaseCPU::regStats();
 
     numInsts
-        .name(name() + ".num_insts")
-        .desc("Number of instructions executed")
+        .name(name() + ".committedInsts")
+        .desc("Number of instructions committed")
+        ;
+
+    numOps
+        .name(name() + ".committedOps")
+        .desc("Number of ops (including micro ops) committed")
         ;
 
     numIntAluAccesses
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 55dec5d53..4c02e2eb0 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -189,20 +189,33 @@ class BaseSimpleCPU : public BaseCPU
     Counter numInst;
     Counter startNumInst;
     Stats::Scalar numInsts;
+    Counter numOp;
+    Counter startNumOp;
+    Stats::Scalar numOps;
 
     void countInst()
     {
-        numInst++;
-        numInsts++;
+        if (!curStaticInst->isMicroop() || curStaticInst->isLastMicroop()) {
+            numInst++;
+            numInsts++;
+        }
+        numOp++;
+        numOps++;
+
         system->totalNumInsts++;
         thread->funcExeInst++;
     }
 
-    virtual Counter totalInstructions() const
+    virtual Counter totalInsts() const
     {
         return numInst - startNumInst;
     }
 
+    virtual Counter totalOps() const
+    {
+        return numOp - startNumOp;
+    }
+
     //number of integer alu accesses
     Stats::Scalar numIntAluAccesses;
 
diff --git a/src/cpu/thread_state.cc b/src/cpu/thread_state.cc
index ca8b9987e..86e552afb 100644
--- a/src/cpu/thread_state.cc
+++ b/src/cpu/thread_state.cc
@@ -43,7 +43,7 @@
 #include "sim/system.hh"
 
 ThreadState::ThreadState(BaseCPU *cpu, ThreadID _tid, Process *_process)
-    : numInst(0), numLoad(0), _status(ThreadContext::Halted),
+    : numInst(0), numOp(0), numLoad(0), _status(ThreadContext::Halted),
       baseCpu(cpu), _threadId(_tid), lastActivate(0), lastSuspend(0),
       profile(NULL), profileNode(NULL), profilePC(0), quiesceEvent(NULL),
       kernelStats(NULL), process(_process), physProxy(NULL), virtProxy(NULL),
diff --git a/src/cpu/thread_state.hh b/src/cpu/thread_state.hh
index 3622ed37f..d1ce83803 100644
--- a/src/cpu/thread_state.hh
+++ b/src/cpu/thread_state.hh
@@ -132,6 +132,10 @@ struct ThreadState {
     Counter numInst;
     /** Stat for number instructions committed. */
     Stats::Scalar numInsts;
+    /** Number of ops (including micro ops) committed. */
+    Counter numOp;
+    /** Stat for number ops (including micro ops) committed. */
+    Stats::Scalar numOps;
     /** Stat for number of memory references. */
     Stats::Scalar numMemRefs;
 
diff --git a/src/sim/stat_control.cc b/src/sim/stat_control.cc
index eb5fe1307..965c081ee 100644
--- a/src/sim/stat_control.cc
+++ b/src/sim/stat_control.cc
@@ -97,11 +97,13 @@ SimTicksReset simTicksReset;
 struct Global
 {
     Stats::Formula hostInstRate;
+    Stats::Formula hostOpRate;
     Stats::Formula hostTickRate;
     Stats::Value hostMemory;
     Stats::Value hostSeconds;
 
     Stats::Value simInsts;
+    Stats::Value simOps;
 
     Global();
 };
@@ -109,13 +111,21 @@ struct Global
 Global::Global()
 {
     simInsts
-        .functor(BaseCPU::numSimulatedInstructions)
+        .functor(BaseCPU::numSimulatedInsts)
         .name("sim_insts")
         .desc("Number of instructions simulated")
         .precision(0)
         .prereq(simInsts)
         ;
 
+    simOps
+        .functor(BaseCPU::numSimulatedOps)
+        .name("sim_ops")
+        .desc("Number of ops (including micro ops) simulated")
+        .precision(0)
+        .prereq(simOps)
+        ;
+
     simSeconds
         .name("sim_seconds")
         .desc("Number of seconds simulated")
@@ -147,6 +157,13 @@ Global::Global()
         .prereq(simInsts)
         ;
 
+    hostOpRate
+        .name("host_op_rate")
+        .desc("Simulator op (including micro ops) rate (op/s)")
+        .precision(0)
+        .prereq(simOps)
+        ;
+
     hostMemory
         .functor(memUsage)
         .name("host_mem_usage")
@@ -169,6 +186,7 @@ Global::Global()
 
     simSeconds = simTicks / simFreq;
     hostInstRate = simInsts / hostSeconds;
+    hostOpRate = simOps / hostSeconds;
     hostTickRate = simTicks / hostSeconds;
 
     registerResetCallback(&simTicksReset);