diff options
author | Gabe Black <gabeblack@google.com> | 2018-10-12 05:09:27 -0700 |
---|---|---|
committer | Gabe Black <gabeblack@google.com> | 2018-10-17 23:38:47 +0000 |
commit | 095d7fba324222273b92512680ffcfa12dbd7968 (patch) | |
tree | 58709d594ad4764d4aa9a23c88266d0c6bfcb2d0 | |
parent | 4b9f15be1eed720390e7c1e4d663a46d3fe1f0ad (diff) | |
download | gem5-095d7fba324222273b92512680ffcfa12dbd7968.tar.xz |
gpu-compute: Explicitly use little endian packet accessors.
The gpu ISA doesn't have a well defined endianness, but it really
should. It seems that the GPU is only used with x86, and in that
context it would be little endian.
Change-Id: I1620906564a77f44553fbf6d788866e017b6054b
Reviewed-on: https://gem5-review.googlesource.com/c/13463
Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com>
Maintainer: Anthony Gutierrez <anthony.gutierrez@amd.com>
-rw-r--r-- | src/gpu-compute/dispatcher.cc | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/src/gpu-compute/dispatcher.cc b/src/gpu-compute/dispatcher.cc index 41e632dd6..db250c28b 100644 --- a/src/gpu-compute/dispatcher.cc +++ b/src/gpu-compute/dispatcher.cc @@ -139,7 +139,7 @@ GpuDispatcher::read(PacketPtr pkt) assert(pkt->getSize() == 8); uint64_t retval = dispatchActive; - pkt->set(retval); + pkt->setLE(retval); } else { offset -= 8; assert(offset + pkt->getSize() < sizeof(HsaQueueEntry)); @@ -166,16 +166,16 @@ GpuDispatcher::write(PacketPtr pkt) switch (pkt->getSize()) { case 1: - data_val = pkt->get<uint8_t>(); + data_val = pkt->getLE<uint8_t>(); break; case 2: - data_val = pkt->get<uint16_t>(); + data_val = pkt->getLE<uint16_t>(); break; case 4: - data_val = pkt->get<uint32_t>(); + data_val = pkt->getLE<uint32_t>(); break; case 8: - data_val = pkt->get<uint64_t>(); + data_val = pkt->getLE<uint64_t>(); break; default: DPRINTF(GPUDisp, "bad size %d\n", pkt->getSize()); |