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authorGabe Black <gblack@eecs.umich.edu>2011-06-21 19:28:14 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-06-21 19:28:14 -0700
commitefb9f7c2ae124dacdd409f74ec7c4a8ab4fc032b (patch)
treec4217645bde7f680c7940f4f25c0a4a1e9c4be39
parent6630d4c64b52b02acd1674ea949485d3f7e75432 (diff)
downloadgem5-efb9f7c2ae124dacdd409f74ec7c4a8ab4fc032b.tar.xz
X86: Eliminate an unused argument for building store microops.
-rw-r--r--src/arch/x86/isa/microops/ldstop.isa5
1 files changed, 1 insertions, 4 deletions
diff --git a/src/arch/x86/isa/microops/ldstop.isa b/src/arch/x86/isa/microops/ldstop.isa
index 245859722..811b35c8a 100644
--- a/src/arch/x86/isa/microops/ldstop.isa
+++ b/src/arch/x86/isa/microops/ldstop.isa
@@ -177,7 +177,6 @@ def template MicroStoreExecute {{
fault = write(xc, Mem, EA, memFlags);
if(fault == NoFault)
{
- %(post_code)s;
%(op_wb)s;
}
}
@@ -411,8 +410,7 @@ let {{
'(StoreCheck << FlagShift) | Request::LOCKED')
defineMicroLoadOp('Ldfp', 'FpData.uqw = Mem;', big = False)
- def defineMicroStoreOp(mnemonic, code, \
- postCode="", completeCode="", mem_flags="0"):
+ def defineMicroStoreOp(mnemonic, code, completeCode="", mem_flags="0"):
global header_output
global decoder_output
global exec_output
@@ -423,7 +421,6 @@ let {{
# Build up the all register version of this micro op
iop = InstObjParams(name, Name, 'X86ISA::LdStOp',
{"code": code,
- "post_code": postCode,
"complete_code": completeCode,
"ea_code": calculateEA})
header_output += MicroLdStOpDeclare.subst(iop)