diff options
author | Ali Saidi <Ali.Saidi@arm.com> | 2010-08-23 11:18:39 -0500 |
---|---|---|
committer | Ali Saidi <Ali.Saidi@arm.com> | 2010-08-23 11:18:39 -0500 |
commit | f2642e205549efefb7391de32b189e94e5503ddc (patch) | |
tree | a3572aa1e56a3d76012cccb7cd3b679e197c1e8f | |
parent | d4e83a400189ef91a5b0f444c9c99d443cc1a251 (diff) | |
download | gem5-f2642e205549efefb7391de32b189e94e5503ddc.tar.xz |
Loader: Make the load address mask be a parameter of the system rather than a constant.
This allows one two different OS requirements for the same ISA to be handled.
Some OSes are compiled for a virtual address and need to be loaded into physical
memory that starts at address 0, while other bare metal tools generate
images that start at address 0.
-rw-r--r-- | src/arch/alpha/AlphaSystem.py | 1 | ||||
-rw-r--r-- | src/arch/alpha/isa_traits.hh | 3 | ||||
-rw-r--r-- | src/arch/alpha/system.cc | 4 | ||||
-rw-r--r-- | src/arch/arm/ArmSystem.py | 1 | ||||
-rw-r--r-- | src/arch/arm/isa_traits.hh | 3 | ||||
-rw-r--r-- | src/arch/mips/MipsSystem.py | 1 | ||||
-rw-r--r-- | src/arch/mips/isa_traits.hh | 3 | ||||
-rwxr-xr-x | src/arch/mips/system.cc | 2 | ||||
-rw-r--r-- | src/arch/sparc/SparcSystem.py | 2 | ||||
-rw-r--r-- | src/arch/sparc/isa_traits.hh | 5 | ||||
-rw-r--r-- | src/arch/x86/X86System.py | 1 | ||||
-rw-r--r-- | src/arch/x86/isa_traits.hh | 2 | ||||
-rw-r--r-- | src/sim/System.py | 2 | ||||
-rw-r--r-- | src/sim/system.cc | 3 | ||||
-rw-r--r-- | src/sim/system.hh | 8 |
15 files changed, 20 insertions, 21 deletions
diff --git a/src/arch/alpha/AlphaSystem.py b/src/arch/alpha/AlphaSystem.py index a19aeb763..f6d9eb4c6 100644 --- a/src/arch/alpha/AlphaSystem.py +++ b/src/arch/alpha/AlphaSystem.py @@ -35,6 +35,7 @@ class AlphaSystem(System): pal = Param.String("file that contains palcode") system_type = Param.UInt64("Type of system we are emulating") system_rev = Param.UInt64("Revision of system we are emulating") + load_addr_mask = 0xffffffffff class LinuxAlphaSystem(AlphaSystem): type = 'LinuxAlphaSystem' diff --git a/src/arch/alpha/isa_traits.hh b/src/arch/alpha/isa_traits.hh index a5a8bf5a0..349332170 100644 --- a/src/arch/alpha/isa_traits.hh +++ b/src/arch/alpha/isa_traits.hh @@ -76,9 +76,6 @@ const Addr K0SegEnd = ULL(0xfffffdffffffffff); const Addr K1SegBase = ULL(0xfffffe0000000000); const Addr K1SegEnd = ULL(0xffffffffffffffff); -// For loading... XXX This maybe could be USegEnd?? --ali -const Addr LoadAddrMask = ULL(0xffffffffff); - //////////////////////////////////////////////////////////////////////// // // Interrupt levels diff --git a/src/arch/alpha/system.cc b/src/arch/alpha/system.cc index 33db98b9b..2c5570d46 100644 --- a/src/arch/alpha/system.cc +++ b/src/arch/alpha/system.cc @@ -65,8 +65,8 @@ AlphaSystem::AlphaSystem(Params *p) // Load program sections into memory - pal->loadSections(&functionalPort, LoadAddrMask); - console->loadSections(&functionalPort, LoadAddrMask); + pal->loadSections(&functionalPort, loadAddrMask); + console->loadSections(&functionalPort, loadAddrMask); // load symbols if (!console->loadGlobalSymbols(consoleSymtab)) diff --git a/src/arch/arm/ArmSystem.py b/src/arch/arm/ArmSystem.py index 872776c69..a93730867 100644 --- a/src/arch/arm/ArmSystem.py +++ b/src/arch/arm/ArmSystem.py @@ -32,4 +32,5 @@ from System import System class ArmSystem(System): type = 'ArmSystem' + load_addr_mask = 0xffffffff diff --git a/src/arch/arm/isa_traits.hh b/src/arch/arm/isa_traits.hh index d81981ff7..2744ec753 100644 --- a/src/arch/arm/isa_traits.hh +++ b/src/arch/arm/isa_traits.hh @@ -91,9 +91,6 @@ namespace ArmISA const Addr KSeg0Base = ULL(0x80000000); const Addr KSeg0Mask = ULL(0x1FFFFFFF); - // For loading... XXX This maybe could be USegEnd?? --ali - const Addr LoadAddrMask = ULL(0xffffffffff); - const unsigned VABits = 32; const unsigned PABits = 32; // Is this correct? const Addr VAddrImplMask = (ULL(1) << VABits) - 1; diff --git a/src/arch/mips/MipsSystem.py b/src/arch/mips/MipsSystem.py index d271bd387..fc4f1efa3 100644 --- a/src/arch/mips/MipsSystem.py +++ b/src/arch/mips/MipsSystem.py @@ -41,6 +41,7 @@ class MipsSystem(System): hex_file_name = Param.String("test.hex","hex file that contains [address,data] pairs") system_type = Param.UInt64("Type of system we are emulating") system_rev = Param.UInt64("Revision of system we are emulating") + load_addr_mask = 0xffffffffff if buildEnv['FULL_SYSTEM']: class LinuxMipsSystem(MipsSystem): diff --git a/src/arch/mips/isa_traits.hh b/src/arch/mips/isa_traits.hh index aa64be71d..efb1fb594 100644 --- a/src/arch/mips/isa_traits.hh +++ b/src/arch/mips/isa_traits.hh @@ -95,9 +95,6 @@ const Addr KSeg3End = ULL(0xFFFFFFFF); const Addr KSeg3Base = ULL(0xE0000000); -// For loading... XXX This maybe could be USegEnd?? --ali -const Addr LoadAddrMask = ULL(0xffffffffff); - inline Addr Phys2K0Seg(Addr addr) { return addr | KSeg0Base; diff --git a/src/arch/mips/system.cc b/src/arch/mips/system.cc index 325d78c83..d11d473e3 100755 --- a/src/arch/mips/system.cc +++ b/src/arch/mips/system.cc @@ -70,7 +70,7 @@ MipsSystem::MipsSystem(Params *p) : System(p) if (console == NULL) fatal("Could not load console file %s", params()->console); //Load program sections into memory - console->loadSections(&functionalPort, MipsISA::LoadAddrMask); + console->loadSections(&functionalPort, loadAddrMask); //load symbols if (!console->loadGlobalSymbols(consoleSymtab)) diff --git a/src/arch/sparc/SparcSystem.py b/src/arch/sparc/SparcSystem.py index 2e65f640d..92845235a 100644 --- a/src/arch/sparc/SparcSystem.py +++ b/src/arch/sparc/SparcSystem.py @@ -71,4 +71,4 @@ class SparcSystem(System): nvram_bin = Param.String("file that contains the contents of nvram") hypervisor_desc_bin = Param.String("file that contains the hypervisor description") partition_desc_bin = Param.String("file that contains the partition description") - + load_addr_mask = 0xffffffffff diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh index a4dc7322d..0a568ddbe 100644 --- a/src/arch/sparc/isa_traits.hh +++ b/src/arch/sparc/isa_traits.hh @@ -80,11 +80,6 @@ namespace SparcISA const Addr BytesInPageMask = ULL(0x1FFF); #if FULL_SYSTEM - // I don't know what it's for, so I don't - // know what SPARC's value should be - // For loading... XXX This maybe could be USegEnd?? --ali - const Addr LoadAddrMask = ULL(0xffffffffff); - enum InterruptTypes { IT_TRAP_LEVEL_ZERO, diff --git a/src/arch/x86/X86System.py b/src/arch/x86/X86System.py index 89a64504c..8b294fb86 100644 --- a/src/arch/x86/X86System.py +++ b/src/arch/x86/X86System.py @@ -54,6 +54,7 @@ class X86System(System): 'intel mp spec configuration table') acpi_description_table_pointer = Param.X86ACPIRSDP( X86ACPIRSDP(), 'ACPI root description pointer structure') + load_addr_mask = 0xffffffffffffffff class LinuxX86System(X86System): type = 'LinuxX86System' diff --git a/src/arch/x86/isa_traits.hh b/src/arch/x86/isa_traits.hh index 423313b2a..c1036ac01 100644 --- a/src/arch/x86/isa_traits.hh +++ b/src/arch/x86/isa_traits.hh @@ -72,8 +72,6 @@ namespace X86ISA StaticInstPtr decodeInst(ExtMachInst); - const Addr LoadAddrMask = ULL(-1); - // Memory accesses can be unaligned const bool HasUnalignedMemAcc = true; }; diff --git a/src/sim/System.py b/src/sim/System.py index 06a54a78d..5cf46ad75 100644 --- a/src/sim/System.py +++ b/src/sim/System.py @@ -50,3 +50,5 @@ class System(SimObject): kernel = Param.String("", "file that contains the kernel code") readfile = Param.String("", "file to read startup script from") symbolfile = Param.String("", "file to get the symbols from") + load_addr_mask = Param.UInt64(0xffffffffff, + "Address to mask loading binaries with"); diff --git a/src/sim/system.cc b/src/sim/system.cc index c7f5b2d08..45e06616d 100644 --- a/src/sim/system.cc +++ b/src/sim/system.cc @@ -66,6 +66,7 @@ System::System(Params *p) init_param(p->init_param), functionalPort(p->name + "-fport"), virtPort(p->name + "-vport"), + loadAddrMask(p->load_addr_mask), #else page_ptr(0), next_PID(0), @@ -109,7 +110,7 @@ System::System(Params *p) fatal("Could not load kernel file %s", params()->kernel); // Load program sections into memory - kernel->loadSections(&functionalPort, LoadAddrMask); + kernel->loadSections(&functionalPort, loadAddrMask); // setup entry points kernelStart = kernel->textBase(); diff --git a/src/sim/system.hh b/src/sim/system.hh index eabbc8351..cc92bba09 100644 --- a/src/sim/system.hh +++ b/src/sim/system.hh @@ -126,6 +126,14 @@ class System : public SimObject /** Entry point in the kernel to start at */ Addr kernelEntry; + /** Mask that should be anded for binary/symbol loading. + * This allows one two different OS requirements for the same ISA to be + * handled. Some OSes are compiled for a virtual address and need to be + * loaded into physical memory that starts at address 0, while other + * bare metal tools generate images that start at address 0. + */ + Addr loadAddrMask; + #else int page_ptr; |