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| author | Joel Hestness <jthestness@gmail.com> | 2013-09-17 19:39:11 -0500 |
|---|---|---|
| committer | Joel Hestness <jthestness@gmail.com> | 2013-09-17 19:39:11 -0500 |
| commit | 30c588a483138b781a94af20ffc97017cb1faa89 (patch) | |
| tree | 5fbb4e832f16aff846091c10336115f634b70e30 | |
| parent | 143dfa31df3cc61c76e76d8b1418b73183943705 (diff) | |
| download | gem5-30c588a483138b781a94af20ffc97017cb1faa89.tar.xz | |
configs: Fix ruby_fs.py cache line size
Recent changes added setting of system-wide cache line size and these settings
occur in the top-level configs (se.py and fs.py). This setting also needs to
take place in ruby_fs.py. This change sets the cache line size as appropriate.
| -rw-r--r-- | configs/example/ruby_fs.py | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/configs/example/ruby_fs.py b/configs/example/ruby_fs.py index ee7a6b33a..3c3986bdd 100644 --- a/configs/example/ruby_fs.py +++ b/configs/example/ruby_fs.py @@ -89,6 +89,7 @@ elif buildEnv['TARGET_ISA'] == "x86": Simulation.setWorkCountOptions(system, options) else: fatal("incapable of building non-alpha or non-x86 full system!") +system.cache_line_size = options.cacheline_size # Create a top-level voltage domain and clock domain system.voltage_domain = VoltageDomain(voltage = options.sys_voltage) |