pseudo inst: Add new wake cpu instruction for sending a message to wake a cpu.

It's instantaneous and so it's somewhat bogus, but it's a first step.

6 files changed, 17 insertions, 0 deletions

diff --git a/src/arch/alpha/isa/decoder.isa b/src/arch/alpha/isa/decoder.isa
index f057f00cc..67bc5c7a2 100644
--- a/src/arch/alpha/isa/decoder.isa
+++ b/src/arch/alpha/isa/decoder.isa
@@ -815,6 +815,9 @@ decode OPCODE default Unknown::unknown() {
             0x07: rpns({{
                 R0 = PseudoInst::rpns(xc->tcBase());
             }}, IsNonSpeculative, IsUnverifiable);
+            0x09: wakeCPU({{
+                PseudoInst::wakeCPU(xc->tcBase(), R16);
+            }}, IsNonSpeculative, IsUnverifiable);
             0x10: deprecated_ivlb({{
                 warn_once("Obsolete M5 ivlb instruction encountered.\n");
             }});
diff --git a/src/sim/pseudo_inst.cc b/src/sim/pseudo_inst.cc
index 130a2f0fe..f1cf2835d 100644
--- a/src/sim/pseudo_inst.cc
+++ b/src/sim/pseudo_inst.cc
@@ -138,6 +138,15 @@ rpns(ThreadContext *tc)
 }
 
 void
+wakeCPU(ThreadContext *tc, uint64_t cpuid)
+{
+    System *sys = tc->getSystemPtr();
+    ThreadContext *other_tc = sys->threadContexts[cpuid];
+    if (other_tc->status() == ThreadContext::Suspended)
+        other_tc->activate();
+}
+
+void
 m5exit(ThreadContext *tc, Tick delay)
 {
     Tick when = curTick + delay * Clock::Int::ns;
diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh
index 7d013eda7..30996fc3b 100644
--- a/src/sim/pseudo_inst.hh
+++ b/src/sim/pseudo_inst.hh
@@ -55,6 +55,7 @@ void addsymbol(ThreadContext *tc, Addr addr, Addr symbolAddr);
 #endif
 
 uint64_t rpns(ThreadContext *tc);
+void wakeCPU(ThreadContext *tc, uint64_t cpuid);
 void m5exit(ThreadContext *tc, Tick delay);
 void resetstats(ThreadContext *tc, Tick delay, Tick period);
 void dumpstats(ThreadContext *tc, Tick delay, Tick period);
diff --git a/util/m5/m5op.h b/util/m5/m5op.h
index bab2e2b9e..6377af8b7 100644
--- a/util/m5/m5op.h
+++ b/util/m5/m5op.h
@@ -40,6 +40,7 @@ void quiesceNs(uint64_t ns);
 void quiesceCycle(uint64_t cycles);
 uint64_t quiesceTime(void);
 uint64_t rpns();
+void wakeCPU(uint64_t cpuid);
 
 void m5_exit(uint64_t ns_delay);
 uint64_t m5_initparam(void);
diff --git a/util/m5/m5op_alpha.S b/util/m5/m5op_alpha.S
index 77e9afe34..4c04af3f6 100644
--- a/util/m5/m5op_alpha.S
+++ b/util/m5/m5op_alpha.S
@@ -60,6 +60,7 @@ func:
 #define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func)
 #define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func)
 #define RPNS INST(m5_op, 0, 0, rpns_func)
+#define WAKE_CPU(r1) INST(m5_op, r1, 0, wakecpu_func)
 #define M5EXIT(reg) INST(m5_op, reg, 0, exit_func)
 #define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func)
 #define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func)
@@ -81,6 +82,7 @@ SIMPLE_OP(quiesceNs, QUIESCENS(16))
 SIMPLE_OP(quiesceCycle, QUIESCECYC(16))
 SIMPLE_OP(quiesceTime, QUIESCETIME)
 SIMPLE_OP(rpns, RPNS)
+SIMPLE_OP(wakeCPU, WAKE_CPU(16))
 SIMPLE_OP(m5_exit, M5EXIT(16))
 SIMPLE_OP(m5_initparam, INITPARAM(0))
 SIMPLE_OP(m5_loadsymbol, LOADSYMBOL(0))
diff --git a/util/m5/m5ops.h b/util/m5/m5ops.h
index ab9bdd857..b2f896fb1 100644
--- a/util/m5/m5ops.h
+++ b/util/m5/m5ops.h
@@ -35,6 +35,7 @@
 #define quiescecycle_func       0x03
 #define quiescetime_func        0x04
 #define rpns_func               0x07
+#define wakecpu_func            0x09
 #define deprecated1_func        0x10 // obsolete ivlb
 #define deprecated2_func        0x11 // obsolete ivle
 #define deprecated3_func        0x20 // deprecated exit function