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author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-01 17:07:18 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-01 17:07:18 -0800 |
commit | 9b4d1e0f9a08ff36651d12151d0b51c37fefd643 (patch) | |
tree | ef55febdce3222807e0122990f29f4b360126e50 | |
parent | 041402a949ac61c2b871ce0595fd6a406ea9629c (diff) | |
download | gem5-9b4d1e0f9a08ff36651d12151d0b51c37fefd643.tar.xz |
X86: Distinguish between hardware and software interrupts/exceptions
-rw-r--r-- | src/arch/x86/isa/microasm.isa | 2 | ||||
-rw-r--r-- | src/arch/x86/isa/microops/regop.isa | 6 |
2 files changed, 5 insertions, 3 deletions
diff --git a/src/arch/x86/isa/microasm.isa b/src/arch/x86/isa/microasm.isa index bc49d3362..778754e0c 100644 --- a/src/arch/x86/isa/microasm.isa +++ b/src/arch/x86/isa/microasm.isa @@ -86,7 +86,7 @@ let {{ # Add in symbols for the various checks of segment selectors. for check in ("NoCheck", "CSCheck", "CallGateCheck", "IntGateCheck", - "SSCheck", "IretCheck", "IntCSCheck"): + "SoftIntGateCheck", "SSCheck", "IretCheck", "IntCSCheck"): assembler.symbols[check] = "Seg%s" % check for reg in ("TR", "IDTR"): diff --git a/src/arch/x86/isa/microops/regop.isa b/src/arch/x86/isa/microops/regop.isa index 200024690..2e6160ec6 100644 --- a/src/arch/x86/isa/microops/regop.isa +++ b/src/arch/x86/isa/microops/regop.isa @@ -234,7 +234,7 @@ output header {{ enum SegmentSelectorCheck { SegNoCheck, SegCSCheck, SegCallGateCheck, SegIntGateCheck, - SegSSCheck, SegIretCheck, SegIntCSCheck + SegSoftIntGateCheck, SegSSCheck, SegIretCheck, SegIntCSCheck }; enum LongModeDescriptorType { @@ -1066,11 +1066,13 @@ let {{ panic("CS checks for far calls/jumps through call gates" "not implemented.\\n"); break; - case SegIntGateCheck: + case SegSoftIntGateCheck: // Check permissions. if (desc.dpl < m5reg.cpl) { fault = new GeneralProtection((uint16_t)selector); } + // Fall through on purpose + case SegIntGateCheck: // Make sure the gate's the right type. if (m5reg.mode == LongMode && ((desc.type & 0xe) != 0xe) || ((desc.type & 0x6) != 0x6)) { |