diff options
author | Kevin Lim <ktlim@umich.edu> | 2006-08-24 17:51:35 -0400 |
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committer | Kevin Lim <ktlim@umich.edu> | 2006-08-24 17:51:35 -0400 |
commit | 9ef831eeefb691eb73531471f7c04bca286f464a (patch) | |
tree | 2e55ca998a1d8387d29e12254b41d233cea63bc4 | |
parent | f9f2f8fbd0bbe3fc7b81a24ea0f628fbce37ef39 (diff) | |
download | gem5-9ef831eeefb691eb73531471f7c04bca286f464a.tar.xz |
Stats updates.
dev/ide_disk.cc:
dev/ide_disk.hh:
Add in stats.
sim/stat_control.cc:
sim/stat_control.hh:
Allow setup event to be called with a specific queue.
--HG--
extra : convert_revision : 9310b132b70f967a198cb2e646433f3a5332671e
-rw-r--r-- | dev/ide_disk.cc | 33 | ||||
-rw-r--r-- | dev/ide_disk.hh | 4 | ||||
-rw-r--r-- | sim/stat_control.cc | 13 | ||||
-rw-r--r-- | sim/stat_control.hh | 4 |
4 files changed, 48 insertions, 6 deletions
diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc index c13556ed6..701d3bf7d 100644 --- a/dev/ide_disk.cc +++ b/dev/ide_disk.cc @@ -406,6 +406,39 @@ IdeDisk::regStats() .name(name() + ".dma_write_txs") .desc("Number of DMA write transactions.") ; + + rdBandwidth + .name(name() + ".rdBandwidth") + .desc("Read Bandwidth (bits/s)") + .precision(0) + .prereq(dmaReadBytes) + ; + + wrBandwidth + .name(name() + ".wrBandwidth") + .desc("Write Bandwidth (bits/s)") + .precision(0) + .prereq(dmaWriteBytes) + ; + + totBandwidth + .name(name() + ".totBandwidth") + .desc("Total Bandwidth (bits/s)") + .precision(0) + .prereq(totBytes) + ; + + totBytes + .name(name() + ".totBytes") + .desc("Total Bytes") + .precision(0) + .prereq(totBytes) + ; + + rdBandwidth = dmaReadBytes * Stats::constant(8) / simSeconds; + wrBandwidth = dmaWriteBytes * Stats::constant(8) / simSeconds; + totBandwidth = rdBandwidth + wrBandwidth; + totBytes = dmaReadBytes + dmaWriteBytes; } void diff --git a/dev/ide_disk.hh b/dev/ide_disk.hh index 402ae44ee..91ea33f4a 100644 --- a/dev/ide_disk.hh +++ b/dev/ide_disk.hh @@ -244,6 +244,10 @@ class IdeDisk : public SimObject Stats::Scalar<> dmaWriteFullPages; Stats::Scalar<> dmaWriteBytes; Stats::Scalar<> dmaWriteTxs; + Stats::Formula rdBandwidth; + Stats::Formula wrBandwidth; + Stats::Formula totBandwidth; + Stats::Formula totBytes; public: /** diff --git a/sim/stat_control.cc b/sim/stat_control.cc index e4394cfa3..33b3ccdb6 100644 --- a/sim/stat_control.cc +++ b/sim/stat_control.cc @@ -158,13 +158,13 @@ class StatEvent : public Event Tick repeat; public: - StatEvent(int _flags, Tick _when, Tick _repeat); + StatEvent(EventQueue *queue, int _flags, Tick _when, Tick _repeat); virtual void process(); virtual const char *description(); }; -StatEvent::StatEvent(int _flags, Tick _when, Tick _repeat) - : Event(&mainEventQueue, Stat_Event_Pri), +StatEvent::StatEvent(EventQueue *queue, int _flags, Tick _when, Tick _repeat) + : Event(queue, Stat_Event_Pri), flags(_flags), repeat(_repeat) { setFlags(AutoDelete); @@ -214,9 +214,12 @@ DumpNow() } void -SetupEvent(int flags, Tick when, Tick repeat) +SetupEvent(int flags, Tick when, Tick repeat, EventQueue *queue) { - new StatEvent(flags, when, repeat); + if (queue == NULL) + queue = &mainEventQueue; + + new StatEvent(queue, flags, when, repeat); } /* namespace Stats */ } diff --git a/sim/stat_control.hh b/sim/stat_control.hh index a22ce76af..806c4be6b 100644 --- a/sim/stat_control.hh +++ b/sim/stat_control.hh @@ -32,6 +32,8 @@ #include <fstream> #include <list> +class EventQueue; + namespace Stats { enum { @@ -43,7 +45,7 @@ class Output; extern std::list<Output *> OutputList; void DumpNow(); -void SetupEvent(int flags, Tick when, Tick repeat = 0); +void SetupEvent(int flags, Tick when, Tick repeat = 0, EventQueue *queue = NULL); void InitSimStats(); |