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| author | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-09 20:18:00 -0400 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-10-09 20:18:00 -0400 |
| commit | ec8a437b2c11453e9b94978b0c18a31f12ec04ac (patch) | |
| tree | fc55b2909d7a5c3140f9bd2eafc16a9ec13318df | |
| parent | 9356bcda7b50ae8916eee2dfbad84ed3ea873c1e (diff) | |
| download | gem5-ec8a437b2c11453e9b94978b0c18a31f12ec04ac.tar.xz | |
Handle NACK's that occur from devices on the same bus.
Not fully implemented yet, but good enough for single level cache coherence
src/mem/packet.hh:
Add a bit to distinguish invalidates and upgrades
--HG--
extra : convert_revision : 5bf50d535857cea37fbdaf7993915d1332cb757e
| -rw-r--r-- | src/mem/cache/cache_impl.hh | 14 | ||||
| -rw-r--r-- | src/mem/packet.hh | 5 |
2 files changed, 13 insertions, 6 deletions
diff --git a/src/mem/cache/cache_impl.hh b/src/mem/cache/cache_impl.hh index c3c1c0881..5c12075cd 100644 --- a/src/mem/cache/cache_impl.hh +++ b/src/mem/cache/cache_impl.hh @@ -287,13 +287,17 @@ template<class TagStore, class Buffering, class Coherence> void Cache<TagStore,Buffering,Coherence>::sendResult(PacketPtr &pkt, MSHR* mshr, bool success) { - if (success) { + if (success && !(pkt->flags & NACKED_LINE)) { missQueue->markInService(pkt, mshr); //Temp Hack for UPGRADES if (pkt->cmd == Packet::UpgradeReq) { + pkt->flags &= ~CACHE_LINE_FILL; handleResponse(pkt); } } else if (pkt && !pkt->req->isUncacheable()) { + pkt->flags &= ~NACKED_LINE; + pkt->flags &= ~SATISFIED; + pkt->flags &= ~SNOOP_COMMIT; missQueue->restoreOrigCmd(pkt); } } @@ -305,8 +309,9 @@ Cache<TagStore,Buffering,Coherence>::handleResponse(Packet * &pkt) BlkType *blk = NULL; if (pkt->senderState) { if (pkt->result == Packet::Nacked) { - pkt->reinitFromRequest(); - panic("Unimplemented NACK of packet\n"); + //pkt->reinitFromRequest(); + warn("NACKs from devices not connected to the same bus not implemented\n"); + return; } if (pkt->result == Packet::BadAddress) { //Make the response a Bad address and send it @@ -397,7 +402,8 @@ Cache<TagStore,Buffering,Coherence>::snoop(Packet * &pkt) assert(!(pkt->flags & SATISFIED)); pkt->flags |= SATISFIED; pkt->flags |= NACKED_LINE; - respondToSnoop(pkt, curTick + hitLatency); + warn("NACKs from devices not connected to the same bus not implemented\n"); + //respondToSnoop(pkt, curTick + hitLatency); return; } else { diff --git a/src/mem/packet.hh b/src/mem/packet.hh index 56c4caffe..e8cbfd10e 100644 --- a/src/mem/packet.hh +++ b/src/mem/packet.hh @@ -174,7 +174,8 @@ class Packet IsResponse = 1 << 5, NeedsResponse = 1 << 6, IsSWPrefetch = 1 << 7, - IsHWPrefetch = 1 << 8 + IsHWPrefetch = 1 << 8, + IsUpgrade = 1 << 9 }; public: @@ -194,7 +195,7 @@ class Packet HardPFResp = IsRead | IsResponse | IsHWPrefetch | NeedsResponse, InvalidateReq = IsInvalidate | IsRequest, WriteInvalidateReq = IsWrite | IsInvalidate | IsRequest, - UpgradeReq = IsInvalidate | IsRequest, + UpgradeReq = IsInvalidate | IsRequest | IsUpgrade, ReadExReq = IsRead | IsInvalidate | IsRequest | NeedsResponse, ReadExResp = IsRead | IsInvalidate | IsResponse | NeedsResponse }; |