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| author | Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> | 2011-05-04 20:38:27 -0500 |
|---|---|---|
| committer | Prakash Ramrakhyani <Prakash.Ramrakhyani@arm.com> | 2011-05-04 20:38:27 -0500 |
| commit | f7380052669eb7030e73d4799fb448ffc8e78680 (patch) | |
| tree | 44f1ec5a6056eca04e1e03876ac2e55dcded9bee | |
| parent | 307f089e7f67d4a314e95a3f53b721e0971e2183 (diff) | |
| download | gem5-f7380052669eb7030e73d4799fb448ffc8e78680.tar.xz | |
ARM: Boot loader changes that make it more flexible about load and I/O addrs
| -rw-r--r-- | system/arm/simple_bootloader/Makefile | 18 | ||||
| -rw-r--r-- | system/arm/simple_bootloader/simple.S | 31 |
2 files changed, 30 insertions, 19 deletions
diff --git a/system/arm/simple_bootloader/Makefile b/system/arm/simple_bootloader/Makefile index 43cd88376..098f3724a 100644 --- a/system/arm/simple_bootloader/Makefile +++ b/system/arm/simple_bootloader/Makefile @@ -34,25 +34,25 @@ # OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. # # Authors: Ali Saidi +# Prakash Ramrakhyani -# Need to have CROSS_COMPILE set to /path/to/bin/arm-none-eabi- -# arm-unknown-linux-gnu- might also work -# -# -CROSS_COMPILE=arm-none-eabi- +# Need to have CROSS_COMPILE set to /path/to/bin/arm-unknown-linux-gnu- +# or have arm-unknown-linux-gnu in your path + +CROSS_COMPILE?=arm-none-linux-gnueabi- CC=$(CROSS_COMPILE)gcc CPP=$(CROSS_COMPILE)g++ LD=$(CROSS_COMPILE)ld -all: boot +all: boot.arm -boot.o: boot.S - $(CC) -mfloat-abi=softfp -march=armv7-a -mfpu=vfpv3 -mthumb -fno-builtin -nostdinc -o boot.o -c boot.S +boot.o: simple.S + $(CC) -mfloat-abi=softfp -march=armv7-a -fno-builtin -nostdinc -o boot.o -c simple.S boot.arm: boot.o - $(LD) -o boot.arm -N -Ttext 0 boot.o -non_shared -static + $(LD) -o boot.arm -N -Ttext 0x80000000 boot.o -non_shared -static clean: diff --git a/system/arm/simple_bootloader/simple.S b/system/arm/simple_bootloader/simple.S index d8f2905e9..afba47728 100644 --- a/system/arm/simple_bootloader/simple.S +++ b/system/arm/simple_bootloader/simple.S @@ -44,7 +44,7 @@ * * Upon executing this code: * r0 = 0, r1 = machine number, r2 = atags ptr - * r3 = kernel start address + * r3 = kernel start address, r4 = GIC address, r5 = flag register address * * CPU 0 should branch to the kernel start address and it's done with * the boot loader. Other CPUs need to start in a wfi loop. When CPU0 sends @@ -56,16 +56,27 @@ .extern main _start: _entry: - mrc p15, 0, r4, c0, c0, 5 // get the MPIDR register - uxtb r4, r4 // isolate the lower 8 bits (affinity lvl 1) - adds r4, r4, #0 // set flags for branch + b bootldr // All the interrupt vectors jump to the boot loader + b bootldr + b bootldr + b bootldr + b bootldr + b bootldr + b bootldr + b bootldr + b bootldr + +bootldr: + mrc p15, 0, r8, c0, c0, 5 // get the MPIDR register + uxtb r8, r8 // isolate the lower 8 bits (affinity lvl 1) + adds r8, r8, #0 // set flags for branch bxeq r3 // if it's 0 (CPU 0), branch to kernel + mov r8, #1 + str r8, [r4, #0] // Enable CPU interface on GIC + wfi // wait for an interrupt pen: - wfi // otherwise wait for an interrupt - mov r4, #0x30 // Build address of the system controller - movt r4, #0x1000 // flag register r4 = 0x10000030 - ldr r5, [r4] // load the value - movs r5, r5 // set the flags on this value + ldr r8, [r5] // load the value + movs r8, r8 // set the flags on this value beq pen // if it's zero try again - bx r5 // Jump to where we've been told + bx r8 // Jump to where we've been told bkpt // We should never get here |