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authorAndreas Hansson <andreas.hansson@arm.com>2015-01-22 05:01:24 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2015-01-22 05:01:24 -0500
commit00536b0efc6d437fdf0cc0374b818b27ba32d217 (patch)
tree9a9eeb74a20a63cd91ecbf200f49b9f473151e34
parent072f78471d11c31b6009beb572296f704912d0f7 (diff)
downloadgem5-00536b0efc6d437fdf0cc0374b818b27ba32d217.tar.xz
mem: Always use SenderState for response routing in RubyPort
This patch aligns how the response routing is done in the RubyPort, using the SenderState for both memory and I/O accesses. Before this patch, only the I/O used the SenderState, whereas the memory accesses relied on the src field in the packet. With this patch we shift to using SenderState in both cases, thus not relying on the src field any longer.
-rw-r--r--src/mem/ruby/system/RubyPort.cc28
-rw-r--r--src/mem/ruby/system/Sequencer.cc2
2 files changed, 18 insertions, 12 deletions
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index 3abdecf3d..66e59144f 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -180,11 +180,6 @@ bool RubyPort::MemMasterPort::recvTimingResp(PacketPtr pkt)
// got a response from a device
assert(pkt->isResponse());
- // In FS mode, ruby memory will receive pio responses from devices
- // and it must forward these responses back to the particular CPU.
- DPRINTF(RubyPort, "Pio response for address %#x, going to %d\n",
- pkt->getAddr(), pkt->getDest());
-
// First we must retrieve the request port from the sender State
RubyPort::SenderState *senderState =
safe_cast<RubyPort::SenderState *>(pkt->popSenderState());
@@ -192,6 +187,11 @@ bool RubyPort::MemMasterPort::recvTimingResp(PacketPtr pkt)
assert(port != NULL);
delete senderState;
+ // In FS mode, ruby memory will receive pio responses from devices
+ // and it must forward these responses back to the particular CPU.
+ DPRINTF(RubyPort, "Pio response for address %#x, going to %s\n",
+ pkt->getAddr(), port->name());
+
// attempt to send the response in the next cycle
port->schedTimingResp(pkt, curTick() + g_system_ptr->clockPeriod());
@@ -246,9 +246,6 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt)
return true;
}
- // Save the port id to be used later to route the response
- pkt->setSrc(id);
-
assert(Address(pkt->getAddr()).getOffset() + pkt->getSize() <=
RubySystem::getBlockSizeBytes());
@@ -259,6 +256,10 @@ RubyPort::MemSlavePort::recvTimingReq(PacketPtr pkt)
// Otherwise, we need to tell the port to retry at a later point
// and return false.
if (requestStatus == RequestStatus_Issued) {
+ // Save the port in the sender state object to be used later to
+ // route the response
+ pkt->pushSenderState(new SenderState(this));
+
DPRINTF(RubyPort, "Request %s 0x%x issued\n", pkt->cmdString(),
pkt->getAddr());
return true;
@@ -343,11 +344,14 @@ RubyPort::ruby_hit_callback(PacketPtr pkt)
assert(system->isMemAddr(pkt->getAddr()));
assert(pkt->isRequest());
- // As it has not yet been turned around, the source field tells us
- // which port it came from.
- assert(pkt->getSrc() < slave_ports.size());
+ // First we must retrieve the request port from the sender State
+ RubyPort::SenderState *senderState =
+ safe_cast<RubyPort::SenderState *>(pkt->popSenderState());
+ MemSlavePort *port = senderState->port;
+ assert(port != NULL);
+ delete senderState;
- slave_ports[pkt->getSrc()]->hitCallback(pkt);
+ port->hitCallback(pkt);
//
// If we had to stall the MemSlavePorts, wake them up because the sequencer
diff --git a/src/mem/ruby/system/Sequencer.cc b/src/mem/ruby/system/Sequencer.cc
index ef1b9676b..dbf350199 100644
--- a/src/mem/ruby/system/Sequencer.cc
+++ b/src/mem/ruby/system/Sequencer.cc
@@ -547,6 +547,8 @@ Sequencer::hitCallback(SequencerRequest* srequest, DataBlock& data,
// subBlock with the recieved data. The tester will later access
// this state.
if (m_usingRubyTester) {
+ DPRINTF(RubySequencer, "hitCallback %s 0x%x using RubyTester\n",
+ pkt->cmdString(), pkt->getAddr());
RubyTester::SenderState* testerSenderState =
pkt->findNextSenderState<RubyTester::SenderState>();
assert(testerSenderState);