Merge m5.eecs.umich.edu:/bk/newmem

into  ewok.(none):/home/gblack/m5/newmem

--HG--
extra : convert_revision : 762df7bf15e8e22a8fab8bbcd933047d1c8cdfa9

4 files changed, 36 insertions, 21 deletions

diff --git a/arch/sparc/isa/decoder.isa b/arch/sparc/isa/decoder.isa
index a1bbf8984..ca8d22419 100644
--- a/arch/sparc/isa/decoder.isa
+++ b/arch/sparc/isa/decoder.isa
@@ -279,8 +279,8 @@ decode OP default Unknown::unknown()
                     0x5: rdpc({{Rd = xc->regs.pc;}}); //RDPC
                     0x6: rdfprs({{Rd = Fprs;}}); //RDFPRS
                     0xF: decode I {
-                        0x0: Noop::membar({{//Membar isn't needed yet}});
-                        0x1: Noop::stbar({{//Stbar isn't needed yet}});
+                        0x0: Noop::membar({{/*Membar isn't needed yet*/}});
+                        0x1: Noop::stbar({{/*Stbar isn't needed yet*/}});
                     }
                 }
                 0x2A: decode RS1 {
@@ -305,19 +305,19 @@ decode OP default Unknown::unknown()
                         0x8: rdprpil({{Rd = Pil;}});
                         0x9: rdprcwp({{Rd = Cwp;}});
                         0xA: rdprcansave({{Rd = Cansave;}});
-                        0xB: rdprcanrestore({{Rd = CanRestore;}});
+                        0xB: rdprcanrestore({{Rd = Canrestore;}});
                         0xC: rdprcleanwin({{Rd = Cleanwin;}});
                         0xD: rdprotherwin({{Rd = Otherwin;}});
                         0xE: rdprwstate({{Rd = Wstate;}});
                     }
                     //The floating point queue isn't implemented right now.
-                    0xF: Trap::rdprfq({{fault = IllegalInstruction;}});
+                    0xF: Trap::rdprfq({{fault = new IllegalInstruction;}});
                     0x1F: Priv::rdprver({{Rd = Ver;}});
                 }
-                0x2B: BasicOperate::flushw({{//window toilet}}); //FLUSHW
+                0x2B: BasicOperate::flushw({{/*window toilet*/}});
                 0x2C: decode MOVCC3
                 {
-                    0x0: Trap::movccfcc({{fault = new FpDisabled}});
+                    0x0: Trap::movccfcc({{fault = new FpDisabled;}});
                     0x1: decode CC
                     {
                         0x0: movcci({{
@@ -362,8 +362,8 @@ decode OP default Unknown::unknown()
                         0xF: Trap::sir({{fault = new SoftwareInitiatedReset;}});
                 }
                 0x31: decode FCN {
-                        0x0: BasicOperate::saved({{//Boogy Boogy}}); //SAVED
-                        0x1: BasicOperate::restored({{//Boogy Boogy}}); //RESTORED
+                        0x0: BasicOperate::saved({{/*Boogy Boogy*/}});
+                        0x1: BasicOperate::restored({{/*Boogy Boogy*/}});
                 }
                 0x32: decode RD {
                     format Priv
@@ -401,8 +401,8 @@ decode OP default Unknown::unknown()
                 0x34: Trap::fpop1({{fault = new FpDisabled;}});
                 0x35: Trap::fpop2({{fault = new FpDisabled;}});
 
-                0x38: Branch::jmpl({{//Stuff}}); //JMPL
-                0x39: Branch::return({{//Other Stuff}}); //RETURN
+                0x38: Branch::jmpl({{/*Stuff*/}});
+                0x39: Branch::return({{/*Other Stuff*/}});
                 0x3A: decode CC
                 {
                     0x0: Trap::tcci({{
@@ -428,12 +428,12 @@ decode OP default Unknown::unknown()
 #endif
                     }});
                 }
-                0x3B: BasicOperate::flush({{//Lala}}); //FLUSH
-                0x3C: BasicOperate::save({{//leprechauns); //SAVE
-                0x3D: BasicOperate::restore({{//Eat my short int}}); //RESTORE
+                0x3B: BasicOperate::flush({{/*Lala*/}});
+                0x3C: BasicOperate::save({{/*leprechauns*/}});
+                0x3D: BasicOperate::restore({{/*Eat my short int*/}});
                 0x3E: decode FCN {
-                    0x1: BasicOperate::done({{//Done thing}}); //DONE
-                    0x2: BasicOperate::retry({{//Retry thing}}); //RETRY
+                    0x1: BasicOperate::done({{/*Done thing*/}});
+                    0x2: BasicOperate::retry({{/*Retry thing*/}});
                 }
             }
     }
diff --git a/arch/sparc/isa/formats/mem.isa b/arch/sparc/isa/formats/mem.isa
index 06725eae8..cf6e7d95b 100644
--- a/arch/sparc/isa/formats/mem.isa
+++ b/arch/sparc/isa/formats/mem.isa
@@ -34,9 +34,10 @@ def template MemExecute {{
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
+            Addr EA;
             %(op_decl)s;
             %(op_rd)s;
-            ea_code
+            %(ea_code)s;
             %(code)s;
 
             if(fault == NoFault)
@@ -54,9 +55,9 @@ def format Mem(code, *opt_flags) {{
         orig_code = code
         cblk = CodeBlock(code)
         iop = InstObjParams(name, Name, 'SparcStaticInst', cblk, opt_flags)
+        iop.ea_code = CodeBlock('EA = I ? (R1 + SIMM13) : R1 + R2;').code
         header_output = BasicDeclare.subst(iop)
         decoder_output = BasicConstructor.subst(iop)
         decode_block = BasicDecode.subst(iop)
         exec_output = MemExecute.subst(iop)
-        exec_output.replace('ea_code', 'EA = I ? (R1 + SIMM13) : R1 + R2;');
 }};
diff --git a/arch/sparc/isa/formats/priv.isa b/arch/sparc/isa/formats/priv.isa
index c89e769b4..162ad5ee0 100644
--- a/arch/sparc/isa/formats/priv.isa
+++ b/arch/sparc/isa/formats/priv.isa
@@ -91,12 +91,18 @@ def template PrivExecute {{
         %(op_decl)s;
         %(op_rd)s;
 
+        //Since these are processed inside templates and not in codeblocks,
+        //They aren't translated by the isa_parser. Their names begin with
+        //underscores so they don't cause conflicts.
+        uint32_t _PstatePriv = xc->readMiscReg(MISCREG_PSTATE_PRIV);
+
         //If the processor isn't in privileged mode, fault out right away
-        if(!PstatePriv)
-            return new PrivilegedOpcode
+        if(!_PstatePriv)
+            return new PrivilegedOpcode;
 
         %(code)s;
         %(op_wb)s;
+        return NoFault;
     }
 }};
 
@@ -107,12 +113,18 @@ def template PrivTickExecute {{
         %(op_decl)s;
         %(op_rd)s;
 
+        //Since these are processed inside templates and not in codeblocks,
+        //They aren't translated by the isa_parser. Their names begin with
+        //underscores so they don't cause conflicts.
+        uint32_t _PstatePriv = xc->readMiscReg(MISCREG_PSTATE_PRIV);
+        uint32_t _TickNpt = xc->readMiscReg(MISCREG_TICK_NPT);
         //If the processor isn't in privileged mode, fault out right away
-        if(!PstatePriv && TickNpt)
-            return new PrivilegedAction
+        if(!_PstatePriv && _TickNpt)
+            return new PrivilegedAction;
 
         %(code)s;
         %(op_wb)s;
+        return NoFault;
     }
 }};
 
diff --git a/arch/sparc/isa/formats/trap.isa b/arch/sparc/isa/formats/trap.isa
index 935fbfe6b..db4494132 100644
--- a/arch/sparc/isa/formats/trap.isa
+++ b/arch/sparc/isa/formats/trap.isa
@@ -36,6 +36,8 @@ def template TrapExecute {{
                 Trace::InstRecord *traceData) const
         {
             Fault fault = NoFault;
+            %(op_decl)s;
+            %(op_rd)s;
             %(code)s
             return fault;
         }