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authorSteve Reinhardt <stever@eecs.umich.edu>2003-10-10 09:57:26 -0700
committerSteve Reinhardt <stever@eecs.umich.edu>2003-10-10 09:57:26 -0700
commit52b31ea0a6a15b4a88530cfe411224d750e37899 (patch)
tree6315a9be6545c32bbe975095b1803f156bbcebd1
parent9e7f6da14195f00333df22a77ca4ed8d62bf8140 (diff)
downloadgem5-52b31ea0a6a15b4a88530cfe411224d750e37899.tar.xz
File moves for the reorg. Tree is in broken state until I commit the makefile and
#include changes. --HG-- rename : sim/cache/lzss_compression.cc => base/compression/lzss_compression.cc rename : sim/cache/lzss_compression.hh => base/compression/lzss_compression.hh rename : sim/cache/null_compression.hh => base/compression/null_compression.hh rename : sim/hybrid_pred.cc => base/hybrid_pred.cc rename : sim/hybrid_pred.hh => base/hybrid_pred.hh rename : base/aout_object.cc => base/loader/aout_object.cc rename : base/aout_object.hh => base/loader/aout_object.hh rename : base/coff_sym.h => base/loader/coff_sym.h rename : base/coff_symconst.h => base/loader/coff_symconst.h rename : base/ecoff_object.cc => base/loader/ecoff_object.cc rename : base/ecoff_object.hh => base/loader/ecoff_object.hh rename : base/elf_object.cc => base/loader/elf_object.cc rename : base/elf_object.hh => base/loader/elf_object.hh rename : base/exec_aout.h => base/loader/exec_aout.h rename : base/exec_ecoff.h => base/loader/exec_ecoff.h rename : base/object_file.cc => base/loader/object_file.cc rename : base/object_file.hh => base/loader/object_file.hh rename : base/symtab.cc => base/loader/symtab.cc rename : base/symtab.hh => base/loader/symtab.hh rename : sim/predictor.hh => base/predictor.hh rename : sim/sat_counter.cc => base/sat_counter.cc rename : sim/sat_counter.hh => base/sat_counter.hh rename : sim/base_cpu.cc => cpu/base_cpu.cc rename : sim/base_cpu.hh => cpu/base_cpu.hh rename : sim/exec_context.cc => cpu/exec_context.cc rename : sim/exec_context.hh => cpu/exec_context.hh rename : sim/exetrace.cc => cpu/exetrace.cc rename : sim/exetrace.hh => cpu/exetrace.hh rename : sim/op_class.hh => cpu/full_cpu/op_class.hh rename : sim/smt.hh => cpu/full_cpu/smt.hh rename : sim/inst_seq.hh => cpu/inst_seq.hh rename : sim/intr_control.cc => cpu/intr_control.cc rename : sim/intr_control.hh => cpu/intr_control.hh rename : sim/memtest.cc => cpu/memtest/memtest.cc rename : sim/memtest.hh => cpu/memtest/memtest.hh rename : sim/pc_event.cc => cpu/pc_event.cc rename : sim/pc_event.hh => cpu/pc_event.hh rename : sim/simple_cpu.cc => cpu/simple_cpu/simple_cpu.cc rename : sim/simple_cpu.hh => cpu/simple_cpu/simple_cpu.hh rename : sim/static_inst.cc => cpu/static_inst.cc rename : sim/static_inst.hh => cpu/static_inst.hh extra : convert_revision : 05bd41acb2a424f1a38609fd4ac6df681bb479d6
-rw-r--r--base/compression/lzss_compression.cc (renamed from sim/cache/lzss_compression.cc)0
-rw-r--r--base/compression/lzss_compression.hh (renamed from sim/cache/lzss_compression.hh)0
-rw-r--r--base/compression/null_compression.hh (renamed from sim/cache/null_compression.hh)0
-rw-r--r--base/hybrid_pred.cc (renamed from sim/hybrid_pred.cc)0
-rw-r--r--base/hybrid_pred.hh (renamed from sim/hybrid_pred.hh)0
-rw-r--r--base/loader/aout_object.cc (renamed from base/aout_object.cc)0
-rw-r--r--base/loader/aout_object.hh (renamed from base/aout_object.hh)0
-rw-r--r--base/loader/coff_sym.h (renamed from base/coff_sym.h)0
-rw-r--r--base/loader/coff_symconst.h (renamed from base/coff_symconst.h)0
-rw-r--r--base/loader/ecoff_object.cc (renamed from base/ecoff_object.cc)0
-rw-r--r--base/loader/ecoff_object.hh (renamed from base/ecoff_object.hh)0
-rw-r--r--base/loader/elf_object.cc (renamed from base/elf_object.cc)0
-rw-r--r--base/loader/elf_object.hh (renamed from base/elf_object.hh)0
-rw-r--r--base/loader/exec_aout.h (renamed from base/exec_aout.h)0
-rw-r--r--base/loader/exec_ecoff.h (renamed from base/exec_ecoff.h)0
-rw-r--r--base/loader/object_file.cc (renamed from base/object_file.cc)0
-rw-r--r--base/loader/object_file.hh (renamed from base/object_file.hh)0
-rw-r--r--base/loader/symtab.cc (renamed from base/symtab.cc)0
-rw-r--r--base/loader/symtab.hh (renamed from base/symtab.hh)0
-rw-r--r--base/predictor.hh (renamed from sim/predictor.hh)0
-rw-r--r--base/sat_counter.cc (renamed from sim/sat_counter.cc)0
-rw-r--r--base/sat_counter.hh (renamed from sim/sat_counter.hh)0
-rw-r--r--cpu/base_cpu.cc (renamed from sim/base_cpu.cc)0
-rw-r--r--cpu/base_cpu.hh (renamed from sim/base_cpu.hh)0
-rw-r--r--cpu/exec_context.cc (renamed from sim/exec_context.cc)0
-rw-r--r--cpu/exec_context.hh (renamed from sim/exec_context.hh)0
-rw-r--r--cpu/exetrace.cc (renamed from sim/exetrace.cc)0
-rw-r--r--cpu/exetrace.hh (renamed from sim/exetrace.hh)0
-rw-r--r--cpu/full_cpu/op_class.hh (renamed from sim/op_class.hh)0
-rw-r--r--cpu/full_cpu/smt.hh (renamed from sim/smt.hh)0
-rw-r--r--cpu/inst_seq.hh (renamed from sim/inst_seq.hh)0
-rw-r--r--cpu/intr_control.cc (renamed from sim/intr_control.cc)0
-rw-r--r--cpu/intr_control.hh (renamed from sim/intr_control.hh)0
-rw-r--r--cpu/memtest/memtest.cc (renamed from sim/memtest.cc)0
-rw-r--r--cpu/memtest/memtest.hh (renamed from sim/memtest.hh)0
-rw-r--r--cpu/pc_event.cc (renamed from sim/pc_event.cc)0
-rw-r--r--cpu/pc_event.hh (renamed from sim/pc_event.hh)0
-rw-r--r--cpu/simple_cpu/simple_cpu.cc (renamed from sim/simple_cpu.cc)0
-rw-r--r--cpu/simple_cpu/simple_cpu.hh (renamed from sim/simple_cpu.hh)0
-rw-r--r--cpu/static_inst.cc (renamed from sim/static_inst.cc)0
-rw-r--r--cpu/static_inst.hh (renamed from sim/static_inst.hh)0
41 files changed, 0 insertions, 0 deletions
diff --git a/sim/cache/lzss_compression.cc b/base/compression/lzss_compression.cc
index a1933215a..a1933215a 100644
--- a/sim/cache/lzss_compression.cc
+++ b/base/compression/lzss_compression.cc
diff --git a/sim/cache/lzss_compression.hh b/base/compression/lzss_compression.hh
index 5fb47d3f1..5fb47d3f1 100644
--- a/sim/cache/lzss_compression.hh
+++ b/base/compression/lzss_compression.hh
diff --git a/sim/cache/null_compression.hh b/base/compression/null_compression.hh
index d2bc76eef..d2bc76eef 100644
--- a/sim/cache/null_compression.hh
+++ b/base/compression/null_compression.hh
diff --git a/sim/hybrid_pred.cc b/base/hybrid_pred.cc
index ed7f781b2..ed7f781b2 100644
--- a/sim/hybrid_pred.cc
+++ b/base/hybrid_pred.cc
diff --git a/sim/hybrid_pred.hh b/base/hybrid_pred.hh
index f6e14e3e3..f6e14e3e3 100644
--- a/sim/hybrid_pred.hh
+++ b/base/hybrid_pred.hh
diff --git a/base/aout_object.cc b/base/loader/aout_object.cc
index c0f43a687..c0f43a687 100644
--- a/base/aout_object.cc
+++ b/base/loader/aout_object.cc
diff --git a/base/aout_object.hh b/base/loader/aout_object.hh
index baa8904a8..baa8904a8 100644
--- a/base/aout_object.hh
+++ b/base/loader/aout_object.hh
diff --git a/base/coff_sym.h b/base/loader/coff_sym.h
index dae9d8590..dae9d8590 100644
--- a/base/coff_sym.h
+++ b/base/loader/coff_sym.h
diff --git a/base/coff_symconst.h b/base/loader/coff_symconst.h
index caed413c2..caed413c2 100644
--- a/base/coff_symconst.h
+++ b/base/loader/coff_symconst.h
diff --git a/base/ecoff_object.cc b/base/loader/ecoff_object.cc
index 87ad6fdca..87ad6fdca 100644
--- a/base/ecoff_object.cc
+++ b/base/loader/ecoff_object.cc
diff --git a/base/ecoff_object.hh b/base/loader/ecoff_object.hh
index af757cd0e..af757cd0e 100644
--- a/base/ecoff_object.hh
+++ b/base/loader/ecoff_object.hh
diff --git a/base/elf_object.cc b/base/loader/elf_object.cc
index 97f50e289..97f50e289 100644
--- a/base/elf_object.cc
+++ b/base/loader/elf_object.cc
diff --git a/base/elf_object.hh b/base/loader/elf_object.hh
index c90f6ebd5..c90f6ebd5 100644
--- a/base/elf_object.hh
+++ b/base/loader/elf_object.hh
diff --git a/base/exec_aout.h b/base/loader/exec_aout.h
index baed30c42..baed30c42 100644
--- a/base/exec_aout.h
+++ b/base/loader/exec_aout.h
diff --git a/base/exec_ecoff.h b/base/loader/exec_ecoff.h
index 8c559ab90..8c559ab90 100644
--- a/base/exec_ecoff.h
+++ b/base/loader/exec_ecoff.h
diff --git a/base/object_file.cc b/base/loader/object_file.cc
index 07b10b5ee..07b10b5ee 100644
--- a/base/object_file.cc
+++ b/base/loader/object_file.cc
diff --git a/base/object_file.hh b/base/loader/object_file.hh
index 1e37b7b70..1e37b7b70 100644
--- a/base/object_file.hh
+++ b/base/loader/object_file.hh
diff --git a/base/symtab.cc b/base/loader/symtab.cc
index 7beee182b..7beee182b 100644
--- a/base/symtab.cc
+++ b/base/loader/symtab.cc
diff --git a/base/symtab.hh b/base/loader/symtab.hh
index 073325eba..073325eba 100644
--- a/base/symtab.hh
+++ b/base/loader/symtab.hh
diff --git a/sim/predictor.hh b/base/predictor.hh
index 7c446f26c..7c446f26c 100644
--- a/sim/predictor.hh
+++ b/base/predictor.hh
diff --git a/sim/sat_counter.cc b/base/sat_counter.cc
index dc365f0f3..dc365f0f3 100644
--- a/sim/sat_counter.cc
+++ b/base/sat_counter.cc
diff --git a/sim/sat_counter.hh b/base/sat_counter.hh
index 18eab3574..18eab3574 100644
--- a/sim/sat_counter.hh
+++ b/base/sat_counter.hh
diff --git a/sim/base_cpu.cc b/cpu/base_cpu.cc
index 06b2ec65c..06b2ec65c 100644
--- a/sim/base_cpu.cc
+++ b/cpu/base_cpu.cc
diff --git a/sim/base_cpu.hh b/cpu/base_cpu.hh
index 745220d85..745220d85 100644
--- a/sim/base_cpu.hh
+++ b/cpu/base_cpu.hh
diff --git a/sim/exec_context.cc b/cpu/exec_context.cc
index c81d172a8..c81d172a8 100644
--- a/sim/exec_context.cc
+++ b/cpu/exec_context.cc
diff --git a/sim/exec_context.hh b/cpu/exec_context.hh
index 988673a0f..988673a0f 100644
--- a/sim/exec_context.hh
+++ b/cpu/exec_context.hh
diff --git a/sim/exetrace.cc b/cpu/exetrace.cc
index 4c5d14893..4c5d14893 100644
--- a/sim/exetrace.cc
+++ b/cpu/exetrace.cc
diff --git a/sim/exetrace.hh b/cpu/exetrace.hh
index 2eb7753e5..2eb7753e5 100644
--- a/sim/exetrace.hh
+++ b/cpu/exetrace.hh
diff --git a/sim/op_class.hh b/cpu/full_cpu/op_class.hh
index 67ccaabad..67ccaabad 100644
--- a/sim/op_class.hh
+++ b/cpu/full_cpu/op_class.hh
diff --git a/sim/smt.hh b/cpu/full_cpu/smt.hh
index f9c1e4614..f9c1e4614 100644
--- a/sim/smt.hh
+++ b/cpu/full_cpu/smt.hh
diff --git a/sim/inst_seq.hh b/cpu/inst_seq.hh
index 9c3898ff7..9c3898ff7 100644
--- a/sim/inst_seq.hh
+++ b/cpu/inst_seq.hh
diff --git a/sim/intr_control.cc b/cpu/intr_control.cc
index 7ad32a2b9..7ad32a2b9 100644
--- a/sim/intr_control.cc
+++ b/cpu/intr_control.cc
diff --git a/sim/intr_control.hh b/cpu/intr_control.hh
index 660d6d704..660d6d704 100644
--- a/sim/intr_control.hh
+++ b/cpu/intr_control.hh
diff --git a/sim/memtest.cc b/cpu/memtest/memtest.cc
index 70b6fbf13..70b6fbf13 100644
--- a/sim/memtest.cc
+++ b/cpu/memtest/memtest.cc
diff --git a/sim/memtest.hh b/cpu/memtest/memtest.hh
index aa652abbd..aa652abbd 100644
--- a/sim/memtest.hh
+++ b/cpu/memtest/memtest.hh
diff --git a/sim/pc_event.cc b/cpu/pc_event.cc
index 4de425199..4de425199 100644
--- a/sim/pc_event.cc
+++ b/cpu/pc_event.cc
diff --git a/sim/pc_event.hh b/cpu/pc_event.hh
index 24442f5f4..24442f5f4 100644
--- a/sim/pc_event.hh
+++ b/cpu/pc_event.hh
diff --git a/sim/simple_cpu.cc b/cpu/simple_cpu/simple_cpu.cc
index 41a612318..41a612318 100644
--- a/sim/simple_cpu.cc
+++ b/cpu/simple_cpu/simple_cpu.cc
diff --git a/sim/simple_cpu.hh b/cpu/simple_cpu/simple_cpu.hh
index c5671eb6f..c5671eb6f 100644
--- a/sim/simple_cpu.hh
+++ b/cpu/simple_cpu/simple_cpu.hh
diff --git a/sim/static_inst.cc b/cpu/static_inst.cc
index cf25d5f05..cf25d5f05 100644
--- a/sim/static_inst.cc
+++ b/cpu/static_inst.cc
diff --git a/sim/static_inst.hh b/cpu/static_inst.hh
index b8f9cc00a..b8f9cc00a 100644
--- a/sim/static_inst.hh
+++ b/cpu/static_inst.hh