Merge zizzer.eecs.umich.edu:/m5/Bitkeeper/m5

into zizzer.eecs.umich.edu:/z/alschult/linux

--HG--
extra : convert_revision : 2ea2bbd41f7e0c257b374d9cd0e37abaf6a7c170

6 files changed, 103 insertions, 25 deletions

diff --git a/arch/alpha/alpha_linux_process.cc b/arch/alpha/alpha_linux_process.cc
index ae197d1ac..b9eb42a21 100644
--- a/arch/alpha/alpha_linux_process.cc
+++ b/arch/alpha/alpha_linux_process.cc
@@ -106,6 +106,7 @@ class Linux {
         uint32_t	st_uid;		//!< owner's user ID
         uint32_t	st_gid;		//!< owner's group ID
         uint32_t	st_rdev;	//!< device number
+        int32_t		_pad1;		//!< for alignment
         int64_t		st_size;	//!< file size in bytes
         uint64_t	st_atimeX;	//!< time of last access
         uint64_t	st_mtimeX;	//!< time of last modification
@@ -264,7 +265,7 @@ class Linux {
               // I don't think this exactly matches the HW FPCR
               *fpcr = 0;
               fpcr.copyOut(xc->mem);
-              return 1;
+              return 0;
           }
 
           default:
@@ -273,7 +274,7 @@ class Linux {
             break;
         }
 
-        return 0;
+        return 1;
     }
 
     /// Target osf_setsysinfo() handler.
@@ -292,7 +293,7 @@ class Linux {
               fpcr.copyIn(xc->mem);
               DPRINTFR(SyscallVerbose, "osf_setsysinfo(SSI_IEEE_FP_CONTROL): "
                        " setting FPCR to 0x%x\n", *(uint64_t*)fpcr);
-              return 1;
+              return 0;
           }
 
           default:
@@ -301,7 +302,7 @@ class Linux {
             break;
         }
 
-        return 0;
+        return 1;
     }
 
     /// Target fnctl() handler.
@@ -810,6 +811,37 @@ SyscallDesc Linux::syscallDescs[] = {
     /* 391 */ SyscallDesc("removexattr", unimplementedFunc),
     /* 392 */ SyscallDesc("lremovexattr", unimplementedFunc),
     /* 393 */ SyscallDesc("fremovexattr", unimplementedFunc),
+    /* 394 */ SyscallDesc("futex", unimplementedFunc),
+    /* 395 */ SyscallDesc("sched_setaffinity", unimplementedFunc),
+    /* 396 */ SyscallDesc("sched_getaffinity", unimplementedFunc),
+    /* 397 */ SyscallDesc("tuxcall", unimplementedFunc),
+    /* 398 */ SyscallDesc("io_setup", unimplementedFunc),
+    /* 399 */ SyscallDesc("io_destroy", unimplementedFunc),
+    /* 400 */ SyscallDesc("io_getevents", unimplementedFunc),
+    /* 401 */ SyscallDesc("io_submit", unimplementedFunc),
+    /* 402 */ SyscallDesc("io_cancel", unimplementedFunc),
+    /* 403 */ SyscallDesc("unknown #403", unimplementedFunc),
+    /* 404 */ SyscallDesc("unknown #404", unimplementedFunc),
+    /* 405 */ SyscallDesc("exit_group", exitFunc), // exit all threads...
+    /* 406 */ SyscallDesc("lookup_dcookie", unimplementedFunc),
+    /* 407 */ SyscallDesc("sys_epoll_create", unimplementedFunc),
+    /* 408 */ SyscallDesc("sys_epoll_ctl", unimplementedFunc),
+    /* 409 */ SyscallDesc("sys_epoll_wait", unimplementedFunc),
+    /* 410 */ SyscallDesc("remap_file_pages", unimplementedFunc),
+    /* 411 */ SyscallDesc("set_tid_address", unimplementedFunc),
+    /* 412 */ SyscallDesc("restart_syscall", unimplementedFunc),
+    /* 413 */ SyscallDesc("fadvise64", unimplementedFunc),
+    /* 414 */ SyscallDesc("timer_create", unimplementedFunc),
+    /* 415 */ SyscallDesc("timer_settime", unimplementedFunc),
+    /* 416 */ SyscallDesc("timer_gettime", unimplementedFunc),
+    /* 417 */ SyscallDesc("timer_getoverrun", unimplementedFunc),
+    /* 418 */ SyscallDesc("timer_delete", unimplementedFunc),
+    /* 419 */ SyscallDesc("clock_settime", unimplementedFunc),
+    /* 420 */ SyscallDesc("clock_gettime", unimplementedFunc),
+    /* 421 */ SyscallDesc("clock_getres", unimplementedFunc),
+    /* 422 */ SyscallDesc("clock_nanosleep", unimplementedFunc),
+    /* 423 */ SyscallDesc("semtimedop", unimplementedFunc),
+    /* 424 */ SyscallDesc("tgkill", unimplementedFunc)
 };
 
 const int Linux::Num_Syscall_Descs =
@@ -838,4 +870,5 @@ AlphaLinuxProcess::AlphaLinuxProcess(const std::string &name,
                                      std::vector<std::string> &envp)
     : LiveProcess(name, objFile, stdin_fd, stdout_fd, stderr_fd, argv, envp)
 {
+    init_regs->intRegFile[0] = 0;
 }
diff --git a/arch/alpha/vtophys.cc b/arch/alpha/vtophys.cc
index a1afdb05b..5e14b06d3 100644
--- a/arch/alpha/vtophys.cc
+++ b/arch/alpha/vtophys.cc
@@ -96,18 +96,19 @@ vtophys(ExecContext *xc, Addr vaddr)
 {
     Addr ptbr = xc->regs.ipr[AlphaISA::IPR_PALtemp20];
     Addr paddr = 0;
-    if (vaddr < ALPHA_K0SEG_BASE) {
-        DPRINTF(VtoPhys, "vtophys: invalid vaddr %#x", vaddr);
-    } else if (vaddr < ALPHA_K1SEG_BASE) {
-        paddr = ALPHA_K0SEG_TO_PHYS(vaddr);
+    if (PC_PAL(vaddr)) {
+        paddr = vaddr & ~ULL(1);
+    } else if (!ptbr) {
+        paddr = vaddr;
     } else {
-        if (!ptbr)
-            panic("vtophys: ptbr is not set on virtual lookup");
-
-        Addr pte = kernel_pte_lookup(xc->physmem, ptbr, vaddr);
-        uint64_t entry = xc->physmem->phys_read_qword(pte);
-        if (pte && entry_valid(entry))
-            paddr = PMAP_PTE_PA(entry) | (vaddr & PGOFSET);
+        if (vaddr >= ALPHA_K0SEG_BASE && vaddr <= ALPHA_K0SEG_END) {
+            paddr = ALPHA_K0SEG_TO_PHYS(vaddr);
+        } else {
+            Addr pte = kernel_pte_lookup(xc->physmem, ptbr, vaddr);
+            uint64_t entry = xc->physmem->phys_read_qword(pte);
+            if (pte && entry_valid(entry))
+                paddr = PMAP_PTE_PA(entry) | (vaddr & PGOFSET);
+        }
     }
 
     DPRINTF(VtoPhys, "vtophys(%#x) -> %#x\n", vaddr, paddr);
@@ -116,6 +117,12 @@ vtophys(ExecContext *xc, Addr vaddr)
 }
 
 uint8_t *
+ptomem(ExecContext *xc, Addr paddr, size_t len)
+{
+    return xc->physmem->dma_addr(paddr, len);
+}
+
+uint8_t *
 vtomem(ExecContext *xc, Addr vaddr, size_t len)
 {
     Addr paddr = vtophys(xc, vaddr);
diff --git a/arch/alpha/vtophys.hh b/arch/alpha/vtophys.hh
index 47ee538a6..f5696e9c8 100644
--- a/arch/alpha/vtophys.hh
+++ b/arch/alpha/vtophys.hh
@@ -42,6 +42,7 @@ Addr kernel_pte_lookup(PhysicalMemory *pmem, Addr ptbr, Addr vaddr);
 Addr vtophys(PhysicalMemory *xc, Addr vaddr);
 Addr vtophys(ExecContext *xc, Addr vaddr);
 uint8_t *vtomem(ExecContext *xc, Addr vaddr, size_t len);
+uint8_t *ptomem(ExecContext *xc, Addr paddr, size_t len);
 
 void CopyData(ExecContext *xc, void *dst, Addr vaddr, size_t len);
 void CopyString(ExecContext *xc, char *dst, Addr vaddr, size_t maxlen);
diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc
index 4ec5eed59..05de370fd 100644
--- a/cpu/memtest/memtest.cc
+++ b/cpu/memtest/memtest.cc
@@ -50,6 +50,7 @@ MemTest::MemTest(const string &name,
                  FunctionalMemory *check_mem,
                  unsigned _memorySize,
                  unsigned _percentReads,
+                 unsigned _percentCopies,
                  unsigned _percentUncacheable,
                  unsigned _progressInterval,
                  Addr _traceAddr,
@@ -62,6 +63,7 @@ MemTest::MemTest(const string &name,
       checkMem(check_mem),
       size(_memorySize),
       percentReads(_percentReads),
+      percentCopies(_percentCopies),
       percentUncacheable(_percentUncacheable),
       progressInterval(_progressInterval),
       nextProgressMessage(_progressInterval)
@@ -149,15 +151,18 @@ MemTest::completeRequest(MemReqPtr &req, uint8_t *data)
         numWrites++;
         break;
 
+      case Copy:
+        break;
 
       default:
         panic("invalid command");
     }
 
     if (blockAddr(req->paddr) == traceBlockAddr) {
-        cerr << name() << ": completed "
-             << (req->cmd.isWrite() ? "write" : "read") << " access of "
-             << req->size << " bytes at address 0x"
+        cerr << hex << traceBlockAddr << ": " << name() << ": completed "
+             << (req->cmd.isWrite() ? "write" : "read")
+             << " access of "
+             << dec << req->size << " bytes at address 0x"
              << hex << req->paddr << ", value = 0x";
         printData(cerr, req->data, req->size);
         cerr << " @ cycle " << dec << curTick;
@@ -209,6 +214,7 @@ MemTest::tick()
     //make new request
     unsigned cmd = rand() % 100;
     unsigned offset1 = random() % size;
+    unsigned offset2 = random() % size;
     unsigned base = random() % 2;
     uint64_t data = random();
     unsigned access_size = random() % 4;
@@ -237,9 +243,10 @@ MemTest::tick()
         uint8_t *result = new uint8_t[8];
         checkMem->access(Read, req->paddr, result, req->size);
         if (blockAddr(req->paddr) == traceBlockAddr) {
-            cerr << name() << ": initiating read "
+            cerr <<  hex << traceBlockAddr << ": " << name()
+                 << ": initiating read "
                  << ((probe)?"probe of ":"access of ")
-                 << req->size << " bytes from addr 0x"
+                 << dec << req->size << " bytes from addr 0x"
                  << hex << req->paddr << " at cycle "
                  << dec << curTick << endl;
         }
@@ -250,15 +257,16 @@ MemTest::tick()
             req->completionEvent = new MemCompleteEvent(req, result, this);
             cacheInterface->access(req);
         }
-    } else {
+    } else if (cmd < (100 - percentCopies)){
         // write
         req->cmd = Write;
         memcpy(req->data, &data, req->size);
         checkMem->access(Write, req->paddr, req->data, req->size);
         if (blockAddr(req->paddr) == traceBlockAddr) {
-            cerr << name() << ": initiating write "
+            cerr <<  hex << traceBlockAddr << ": "
+                 << name() << ": initiating write "
                  << ((probe)?"probe of ":"access of ")
-                 << req->size << " bytes (value = 0x";
+                 << dec << req->size << " bytes (value = 0x";
             printData(cerr, req->data, req->size);
             cerr << ") to addr 0x"
                  << hex << req->paddr << " at cycle "
@@ -271,6 +279,29 @@ MemTest::tick()
             req->completionEvent = new MemCompleteEvent(req, NULL, this);
             cacheInterface->access(req);
         }
+    } else {
+        // copy
+        Addr source = blockAddr(((base) ? baseAddr1 : baseAddr2) + offset1);
+        Addr dest = blockAddr(((base) ? baseAddr2 : baseAddr1) + offset2);
+        req->cmd = Copy;
+        req->flags &= ~UNCACHEABLE;
+        req->paddr = source;
+        req->dest = dest;
+        delete [] req->data;
+        req->data = new uint8_t[blockSize];
+        req->size = blockSize;
+        if (source == traceBlockAddr || dest == traceBlockAddr) {
+            cerr <<  hex << traceBlockAddr << ": " << name()
+                 << ": initiating copy of "
+                 << dec << req->size << " bytes from addr 0x"
+                 << hex << source << " to addr 0x"
+                 << hex << dest << " at cycle "
+                 << dec << curTick << endl;
+        }
+        cacheInterface->access(req);
+        uint8_t result[blockSize];
+        checkMem->access(Read, source, &result, blockSize);
+        checkMem->access(Write, dest, &result, blockSize);
     }
 }
 
@@ -297,6 +328,7 @@ BEGIN_DECLARE_SIM_OBJECT_PARAMS(MemTest)
     SimObjectParam<FunctionalMemory *> check_mem;
     Param<unsigned> memory_size;
     Param<unsigned> percent_reads;
+    Param<unsigned> percent_copies;
     Param<unsigned> percent_uncacheable;
     Param<unsigned> progress_interval;
     Param<Addr> trace_addr;
@@ -313,6 +345,7 @@ BEGIN_INIT_SIM_OBJECT_PARAMS(MemTest)
     INIT_PARAM(check_mem, "check memory"),
     INIT_PARAM_DFLT(memory_size, "memory size", 65536),
     INIT_PARAM_DFLT(percent_reads, "target read percentage", 65),
+    INIT_PARAM_DFLT(percent_copies, "target copy percentage", 0),
     INIT_PARAM_DFLT(percent_uncacheable, "target uncacheable percentage", 10),
     INIT_PARAM_DFLT(progress_interval,
                     "progress report interval (in accesses)", 1000000),
@@ -330,7 +363,7 @@ END_INIT_SIM_OBJECT_PARAMS(MemTest)
 CREATE_SIM_OBJECT(MemTest)
 {
     return new MemTest(getInstanceName(), cache->getInterface(), main_mem,
-                       check_mem, memory_size, percent_reads,
+                       check_mem, memory_size, percent_reads, percent_copies,
                        percent_uncacheable, progress_interval,
                        trace_addr, max_loads_any_thread,
                        max_loads_all_threads);
diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh
index 09f22a177..d3ac020fd 100644
--- a/cpu/memtest/memtest.hh
+++ b/cpu/memtest/memtest.hh
@@ -48,6 +48,7 @@ class MemTest : public BaseCPU
             FunctionalMemory *check_mem,
             unsigned _memorySize,
             unsigned _percentReads,
+            unsigned _percentCopies,
             unsigned _percentUncacheable,
             unsigned _progressInterval,
             Addr _traceAddr,
@@ -81,6 +82,7 @@ class MemTest : public BaseCPU
     unsigned size;		// size of testing memory region
 
     unsigned percentReads;	// target percentage of read accesses
+    unsigned percentCopies;	// target percentage of copy accesses
     unsigned percentUncacheable;
 
     unsigned blockSize;
diff --git a/sim/syscall_emul.cc b/sim/syscall_emul.cc
index e953a7308..57ae39cf8 100644
--- a/sim/syscall_emul.cc
+++ b/sim/syscall_emul.cc
@@ -104,7 +104,9 @@ int
 obreakFunc(SyscallDesc *desc, int num, Process *p, ExecContext *xc)
 {
     // change brk addr to first arg
-    p->brk_point = xc->getSyscallArg(0);
+    Addr new_brk = xc->getSyscallArg(0);
+    if (new_brk != 0)
+        p->brk_point = xc->getSyscallArg(0);
     return p->brk_point;
 }