dev-arm: Add a VExpress_GEM5_V2 platform with GICv3 support

Change-Id: I6fd14138d94654e8e60cde08239ea9a50fc19eb7
Reviewed-on: https://gem5-review.googlesource.com/c/14255
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>

2 files changed, 41 insertions, 12 deletions

diff --git a/configs/common/FSConfig.py b/configs/common/FSConfig.py
index 674761634..e4babbcb6 100644
--- a/configs/common/FSConfig.py
+++ b/configs/common/FSConfig.py
@@ -330,7 +330,10 @@ def makeArmSystem(mem_mode, machine_type, num_cpus=1, mdesc=None,
             self.realview.setupBootLoader(None, self, binary)
         else:
             self.realview.setupBootLoader(self.membus, self, binary)
-        self.gic_cpu_addr = self.realview.gic.cpu_addr
+
+        if hasattr(self.realview.gic, 'cpu_addr'):
+            self.gic_cpu_addr = self.realview.gic.cpu_addr
+
         self.flags_addr = self.realview.realview_io.pio_addr + 0x30
 
         # This check is for users who have previously put 'android' in
diff --git a/src/dev/arm/RealView.py b/src/dev/arm/RealView.py
index 0ed7780a5..60ae5aa89 100644
--- a/src/dev/arm/RealView.py
+++ b/src/dev/arm/RealView.py
@@ -853,7 +853,7 @@ class VExpress_EMM64(VExpress_EMM):
         cur_sys.atags_addr = 0x8000000
         cur_sys.load_offset = 0x80000000
 
-class VExpress_GEM5_V1_Base(RealView):
+class VExpress_GEM5_Base(RealView):
     """
 The VExpress gem5 memory map is loosely based on a modified
 Versatile Express RS1 memory map.
@@ -967,14 +967,6 @@ Interrupts:
     dcc = CoreTile2A15DCC()
 
     ### On-chip devices ###
-    gic = kvm_gicv2_class(dist_addr=0x2c001000, cpu_addr=0x2c002000,
-                          it_lines=512)
-    vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)
-    gicv2m = Gicv2m()
-    gicv2m.frames = [
-        Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c0000),
-    ]
-
     generic_timer = GenericTimer(int_phys_s=ArmPPI(num=29),
                                  int_phys_ns=ArmPPI(num=30),
                                  int_virt=ArmPPI(num=27),
@@ -982,7 +974,6 @@ Interrupts:
 
     def _on_chip_devices(self):
         return [
-            self.gic, self.vgic, self.gicv2m,
             self.generic_timer,
         ]
 
@@ -1049,7 +1040,7 @@ Interrupts:
 
     def generateDeviceTree(self, state):
         # Generate using standard RealView function
-        dt = list(super(VExpress_GEM5_V1_Base, self).generateDeviceTree(state))
+        dt = list(super(VExpress_GEM5_Base, self).generateDeviceTree(state))
         if len(dt) > 1:
             raise Exception("System returned too many DT nodes")
         node = dt[0]
@@ -1061,6 +1052,19 @@ Interrupts:
 
         yield node
 
+class VExpress_GEM5_V1_Base(VExpress_GEM5_Base):
+    gic = kvm_gicv2_class(dist_addr=0x2c001000, cpu_addr=0x2c002000,
+                          it_lines=512)
+    vgic = VGic(vcpu_addr=0x2c006000, hv_addr=0x2c004000, ppint=25)
+    gicv2m = Gicv2m()
+    gicv2m.frames = [
+        Gicv2mFrame(spi_base=256, spi_len=64, addr=0x2c1c0000),
+    ]
+
+    def _on_chip_devices(self):
+        return super(VExpress_GEM5_V1_Base,self)._on_chip_devices() + [
+                self.gic, self.vgic, self.gicv2m,
+            ]
 
 class VExpress_GEM5_V1(VExpress_GEM5_V1_Base):
     hdlcd  = HDLcd(pxl_clk=VExpress_GEM5_V1_Base.dcc.osc_pxl,
@@ -1070,3 +1074,25 @@ class VExpress_GEM5_V1(VExpress_GEM5_V1_Base):
         return super(VExpress_GEM5_V1,self)._on_chip_devices() + [
                 self.hdlcd,
             ]
+
+class VExpress_GEM5_V2_Base(VExpress_GEM5_Base):
+    gic = Gicv3()
+
+    def _on_chip_devices(self):
+        return super(VExpress_GEM5_V2_Base,self)._on_chip_devices() + [
+                self.gic,
+            ]
+
+    def setupBootLoader(self, mem_bus, cur_sys, loc):
+        cur_sys.boot_loader = [ loc('boot_emm_v2.arm64') ]
+        super(VExpress_GEM5_V2_Base,self).setupBootLoader(mem_bus,
+                cur_sys, loc)
+
+class VExpress_GEM5_V2(VExpress_GEM5_V2_Base):
+    hdlcd  = HDLcd(pxl_clk=VExpress_GEM5_V2_Base.dcc.osc_pxl,
+                   pio_addr=0x2b000000, int_num=95)
+
+    def _on_chip_devices(self):
+        return super(VExpress_GEM5_V2,self)._on_chip_devices() + [
+                self.hdlcd,
+            ]