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| author | Ron Dreslinski <rdreslin@umich.edu> | 2005-03-30 04:46:04 -0500 |
|---|---|---|
| committer | Ron Dreslinski <rdreslin@umich.edu> | 2005-03-30 04:46:04 -0500 |
| commit | cda8f99a5664a79f94b9ce84a4c6f456cf0ea976 (patch) | |
| tree | f185935ec2026a7886c255421e87cec8ccb8d28f | |
| parent | 2b89c38172cafd0abc9b0f0b0e5db0ff3f398232 (diff) | |
| download | gem5-cda8f99a5664a79f94b9ce84a4c6f456cf0ea976.tar.xz | |
First pass at a prefetcher
SConscript:
Add prefetcher to the compilation
base/traceflags.py:
Add a trace flag for hardware prefetches
--HG--
extra : convert_revision : bc210192a2b75b1470b2cd9d5d470fc61cb11315
| -rw-r--r-- | SConscript | 1 | ||||
| -rw-r--r-- | base/traceflags.py | 3 |
2 files changed, 3 insertions, 1 deletions
diff --git a/SConscript b/SConscript index 19f84f913..6fe99b314 100644 --- a/SConscript +++ b/SConscript @@ -164,6 +164,7 @@ base_sources = Split(''' mem/cache/miss/miss_queue.cc mem/cache/miss/mshr.cc mem/cache/miss/mshr_queue.cc + mem/cache/miss/prefetcher.cc mem/cache/tags/base_tags.cc mem/cache/tags/cache_tags.cc mem/cache/tags/fa_lru.cc diff --git a/base/traceflags.py b/base/traceflags.py index 800c47bd3..74b87e1b9 100644 --- a/base/traceflags.py +++ b/base/traceflags.py @@ -123,7 +123,8 @@ baseFlags = [ 'Uart', 'Split', 'SQL', - 'Thread' + 'Thread', + 'HWPrefetch' ] # |