diff options
author | Steve Reinhardt <stever@eecs.umich.edu> | 2003-12-15 21:07:04 -0800 |
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committer | Steve Reinhardt <stever@eecs.umich.edu> | 2003-12-15 21:07:04 -0800 |
commit | f47dcadfd8b50e97b51c05b72f19063b39686a7c (patch) | |
tree | 5b05ef12c1d674d841b45cfa65dae415b7e9449f | |
parent | ce4aba3e54eb69b0902c75de2db1810ed7dcfe6b (diff) | |
parent | 2cd5e980d2e7b33d61b5a5639784b424fa74142a (diff) | |
download | gem5-f47dcadfd8b50e97b51c05b72f19063b39686a7c.tar.xz |
Merge zizzer:/bk/m5 into isabel.reinhardt.house:/z/stever/bk/m5
--HG--
extra : convert_revision : dd887635c7ce74324b3670744461ffdf92e1dedf
-rw-r--r-- | arch/alpha/alpha_memory.cc | 8 | ||||
-rw-r--r-- | arch/alpha/ev5.cc | 10 | ||||
-rw-r--r-- | arch/alpha/isa_desc | 50 | ||||
-rw-r--r-- | base/fast_alloc.cc | 4 | ||||
-rw-r--r-- | base/fast_alloc.hh | 9 | ||||
-rw-r--r-- | base/statistics.hh | 4 | ||||
-rwxr-xr-x | util/rundiff | 10 |
7 files changed, 70 insertions, 25 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index c79b821d0..d934299b8 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -436,12 +436,12 @@ AlphaDtb::translate(MemReqPtr req, bool write) const else read_accesses++; - AlphaISA::md_mode_type mode = - (AlphaISA::md_mode_type)DTB_CM_CM(ipr[AlphaISA::IPR_DTB_CM]); + AlphaISA::mode_type mode = + (AlphaISA::mode_type)DTB_CM_CM(ipr[AlphaISA::IPR_DTB_CM]); if (PC_PAL(pc)) { - mode = (req->flags & ALTMODE) ? (AlphaISA::md_mode_type) - (ALT_MODE_AM(ipr[AlphaISA::IPR_ALT_MODE])) + mode = (req->flags & ALTMODE) ? + (AlphaISA::mode_type)ALT_MODE_AM(ipr[AlphaISA::IPR_ALT_MODE]) : AlphaISA::mode_kernel; } diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index 6759fdbf9..8494ee9f6 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -551,16 +551,14 @@ ExecContext::simPalCheck(int palFunc) switch (palFunc) { case PAL::halt: - if (!misspeculating()) { - halt(); - if (--System::numSystemsRunning == 0) - new SimExitEvent("all cpus halted"); - } + halt(); + if (--System::numSystemsRunning == 0) + new SimExitEvent("all cpus halted"); break; case PAL::bpt: case PAL::bugchk: - if (!misspeculating() && system->breakpoint()) + if (system->breakpoint()) return false; break; } diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index aef9135d3..293b0fcf6 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -1399,6 +1399,7 @@ declare {{ protected: int palFunc; ///< Function code part of instruction int palOffset; ///< Target PC, offset from IPR_PAL_BASE + bool palValid; ///< is the function code valid? bool palPriv; ///< is this call privileged? /// Constructor. @@ -1407,9 +1408,22 @@ declare {{ : AlphaStaticInst(mnem, _machInst, __opClass), palFunc(PALFUNC) { - palPriv = ((machInst & 0x80) != 0); - int shortPalFunc = (machInst & 0x3f); - palOffset = 0x2001 + (palPriv << 12) + (shortPalFunc << 6); + // From the 21164 HRM (paraphrased): + // Bit 7 of the function code (mask 0x80) indicates + // whether the call is privileged (bit 7 == 0) or + // unprivileged (bit 7 == 1). The privileged call table + // starts at 0x2000, the unprivielged call table starts at + // 0x3000. Bits 5-0 (mask 0x3f) are used to calculate the + // offset. + const int palPrivMask = 0x80; + const int palOffsetMask = 0x3f; + + // Pal call is invalid unless all other bits are 0 + palValid = ((machInst & ~(palPrivMask | palOffsetMask)) == 0); + palPriv = ((machInst & palPrivMask) == 0); + int shortPalFunc = (machInst & palOffsetMask); + // Add 1 to base to set pal-mode bit + palOffset = (palPriv ? 0x2001 : 0x3001) + (shortPalFunc << 6); } std::string generateDisassembly(Addr pc, const SymbolTable *symtab) @@ -2353,25 +2367,33 @@ decode OPCODE default Unknown::unknown() { #ifdef FULL_SYSTEM 0x00: CallPal::call_pal({{ - if (palPriv && !PC_PAL(xc->regs.pc)) { - // attempt to do privileged PAL call in non-PAL mode + using namespace AlphaISA; + + if (!palValid || + (palPriv && xc->readIpr(IPR_ICM, fault) != mode_kernel)) { + // invalid pal function code, or attempt to do privileged + // PAL call in non-kernel mode fault = Unimplemented_Opcode_Fault; } else { - // check to see if simulator wants to do something special - // on this PAL call (including maybe suppress it) - bool dopal = xc->simPalCheck(palFunc); - if (!xc->misspeculating()) { + // check to see if simulator wants to do something special + // on this PAL call (including maybe suppress it) + bool dopal = xc->simPalCheck(palFunc); + Annotate::Callpal(xc, palFunc); + + if (dopal) { + swap_palshadow(&xc->regs, true); + xc->setIpr(IPR_EXC_ADDR, NPC); + } } + // if we're misspeculating, it's still safe (if + // unrealistic) to set NPC, as the control-flow change + // won't get committed. if (dopal) { - if (!xc->misspeculating()) { - AlphaISA::swap_palshadow(&xc->regs, true); - } - xc->setIpr(AlphaISA::IPR_EXC_ADDR, NPC); - NPC = xc->readIpr(AlphaISA::IPR_PAL_BASE, fault) + palOffset; + NPC = xc->readIpr(IPR_PAL_BASE, fault) + palOffset; } } }}); diff --git a/base/fast_alloc.cc b/base/fast_alloc.cc index ff0a40c37..abb50aa0c 100644 --- a/base/fast_alloc.cc +++ b/base/fast_alloc.cc @@ -32,6 +32,8 @@ * by permission. */ +#ifndef NO_FAST_ALLOC + #ifdef __GNUC__ #pragma implementation #endif @@ -189,3 +191,5 @@ fast_alloc_oldest(int n) } #endif + +#endif // NO_FAST_ALLOC diff --git a/base/fast_alloc.hh b/base/fast_alloc.hh index 7d699abd1..81f2f1359 100644 --- a/base/fast_alloc.hh +++ b/base/fast_alloc.hh @@ -68,6 +68,13 @@ // (by bucket). // #define FAST_ALLOC_STATS +#ifdef NO_FAST_ALLOC + +class FastAlloc { +}; + +#else + class FastAlloc { public: @@ -200,4 +207,6 @@ void FastAlloc::operator delete(void *p, size_t sz) deallocate(p, sz); } +#endif // NO_FAST_ALLOC + #endif // __FAST_ALLOC_H__ diff --git a/base/statistics.hh b/base/statistics.hh index 732d1766a..ed3278e4a 100644 --- a/base/statistics.hh +++ b/base/statistics.hh @@ -1138,6 +1138,8 @@ class Vector2dBase : public DataAccess protected: typedef Storage<T> storage_t; typedef typename storage_t::Params params_t; + + public: typedef typename Bin::VectorBin<storage_t> bin_t; protected: @@ -1675,6 +1677,8 @@ class VectorDistBase : public DataAccess protected: typedef Storage<T> storage_t; typedef typename storage_t::Params params_t; + + public: typedef typename Bin::VectorBin<storage_t> bin_t; protected: diff --git a/util/rundiff b/util/rundiff index 05beba84b..63c05b96b 100755 --- a/util/rundiff +++ b/util/rundiff @@ -191,7 +191,10 @@ sub printdiff DISCARD_A => \&discard1, DISCARD_B => \&discard2 }); - die "Lost sync!" if (!$match_found); + if (!$match_found) { + printdiff(scalar(@lines1), scalar(@lines2)); + die "Lost sync!"; + } # Since we shouldn't get here unless the first lines of the # buffers are different, then we must discard some lines off @@ -220,7 +223,10 @@ sub checkmatch # treated as common; if that bugs you, use Algorithm::Diff. if ($lines1[$n1] eq $lines2[$n2] && $lines1[$n1+1] eq $lines2[$n2+1]) { printdiff($n1, $n2); + return 1; } + + return 0; } sub simple_diff @@ -240,6 +246,8 @@ sub simple_diff return if checkmatch($cnt, $n); } } + + printdiff(scalar(@lines1), scalar(@lines2)); die "Lost sync!"; } |