diff options
| author | Gabe Black <gabeblack@google.com> | 2019-11-25 03:00:59 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2020-01-07 03:14:23 +0000 |
| commit | 0b52c24da66fd614e04ac1555470ccd68bfbe49d (patch) | |
| tree | d663c28d077039ee2d1e6867cc5f9b5455d514f8 | |
| parent | 46117ecdc9eedbf060f32b9e7fb53f509245332d (diff) | |
| download | gem5-0b52c24da66fd614e04ac1555470ccd68bfbe49d.tar.xz | |
arch,sim: Stop decoding the pseudo inst subfunc value.
This isn't used by anything any more. The func field is left in place
to ensure compatability, but there's no reason to decode a value
nobody is going to use.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187
Change-Id: I85fcd0e4a362551c29af6bff350d99af86050415
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23179
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
| -rw-r--r-- | src/arch/arm/kvm/arm_cpu.cc | 3 | ||||
| -rw-r--r-- | src/arch/generic/mmapped_ipr.cc | 3 | ||||
| -rw-r--r-- | src/sim/pseudo_inst.hh | 5 |
3 files changed, 4 insertions, 7 deletions
diff --git a/src/arch/arm/kvm/arm_cpu.cc b/src/arch/arm/kvm/arm_cpu.cc index 0a77ee0d6..80576a25a 100644 --- a/src/arch/arm/kvm/arm_cpu.cc +++ b/src/arch/arm/kvm/arm_cpu.cc @@ -318,11 +318,10 @@ ArmKvmCPU::onKvmExitHypercall() ThreadContext *tc(getContext(0)); const uint32_t reg_ip(tc->readIntRegFlat(INTREG_R12)); const uint8_t func((reg_ip >> 8) & 0xFF); - const uint8_t subfunc(reg_ip & 0xFF); DPRINTF(Kvm, "KVM Hypercall: %#x/%#x\n", func, subfunc); const uint64_t ret = - PseudoInst::pseudoInst<PseudoInstABI>(getContext(0), func, subfunc); + PseudoInst::pseudoInst<PseudoInstABI>(getContext(0), func); // Just set the return value using the KVM API instead of messing // with the context. We could have used the context, but that diff --git a/src/arch/generic/mmapped_ipr.cc b/src/arch/generic/mmapped_ipr.cc index 8bdd18016..754ee026b 100644 --- a/src/arch/generic/mmapped_ipr.cc +++ b/src/arch/generic/mmapped_ipr.cc @@ -43,11 +43,10 @@ handlePseudoInst(ThreadContext *xc, Packet *pkt) { const Addr offset(pkt->getAddr() & IPR_IN_CLASS_MASK); const uint8_t func((offset >> 8) & 0xFF); - const uint8_t subfunc(offset & 0xFF); uint64_t ret; assert((offset >> 16) == 0); - ret = PseudoInst::pseudoInst<PseudoInstABI>(xc, func, subfunc); + ret = PseudoInst::pseudoInst<PseudoInstABI>(xc, func); if (pkt->isRead()) pkt->set(ret, TheISA::GuestByteOrder); } diff --git a/src/sim/pseudo_inst.hh b/src/sim/pseudo_inst.hh index 8685b8257..caada36c4 100644 --- a/src/sim/pseudo_inst.hh +++ b/src/sim/pseudo_inst.hh @@ -123,14 +123,13 @@ void togglesync(ThreadContext *tc); * manner using the ISA-specific getArguments functions. * * @param func M5 pseudo op major function number (see utility/m5/m5ops.h) - * @param subfunc M5 minor function number. Mainly used for annotations. */ template <typename ABI> uint64_t -pseudoInst(ThreadContext *tc, uint8_t func, uint8_t subfunc) +pseudoInst(ThreadContext *tc, uint8_t func) { - DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i, %i)\n", func, subfunc); + DPRINTF(PseudoInst, "PseudoInst::pseudoInst(%i)\n", func); switch (func) { case M5OP_ARM: |