diff options
author | Ali Saidi <Ali.Saidi@ARM.com> | 2011-06-17 12:20:11 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2011-06-17 12:20:11 -0500 |
commit | 0b7ca66919ee2a90683df1e3340f08fe6c30da5e (patch) | |
tree | 9b62355d8eb8488a012df4e337422bd2e849b6ca | |
parent | 3f1f16703d7d7fafb29fb47415b9aa959fb8eda7 (diff) | |
download | gem5-0b7ca66919ee2a90683df1e3340f08fe6c30da5e.tar.xz |
ARM: Cleanup m5ops usage of r0 and r1 a bit.
-rw-r--r-- | util/m5/m5op_arm.S | 56 |
1 files changed, 28 insertions, 28 deletions
diff --git a/util/m5/m5op_arm.S b/util/m5/m5op_arm.S index b1fb9adc7..b9557ee9d 100644 --- a/util/m5/m5op_arm.S +++ b/util/m5/m5op_arm.S @@ -65,27 +65,27 @@ func: RET; \ END(_f) -#define ARM(reg) INST(m5_op, reg, 0, arm_func) +#define ARM INST(m5_op, 0, 0, arm_func) #define QUIESCE INST(m5_op, 0, 0, quiesce_func) -#define QUIESCENS(r1) INST(m5_op, r1, 0, quiescens_func) -#define QUIESCECYC(r1) INST(m5_op, r1, 0, quiescecycle_func) +#define QUIESCENS INST(m5_op, 0, 0, quiescens_func) +#define QUIESCECYC INST(m5_op, 0, 0, quiescecycle_func) #define QUIESCETIME INST(m5_op, 0, 0, quiescetime_func) #define RPNS INST(m5_op, 0, 0, rpns_func) -#define WAKE_CPU(r1) INST(m5_op, r1, 0, wakecpu_func) -#define M5EXIT(reg) INST(m5_op, reg, 0, exit_func) -#define INITPARAM(reg) INST(m5_op, reg, 0, initparam_func) -#define LOADSYMBOL(reg) INST(m5_op, reg, 0, loadsymbol_func) -#define RESET_STATS(r1, r2) INST(m5_op, r1, r2, resetstats_func) -#define DUMP_STATS(r1, r2) INST(m5_op, r1, r2, dumpstats_func) -#define DUMPRST_STATS(r1, r2) INST(m5_op, r1, r2, dumprststats_func) -#define CHECKPOINT(r1, r2) INST(m5_op, r1, r2, ckpt_func) +#define WAKE_CPU INST(m5_op, 0, 0, wakecpu_func) +#define M5EXIT INST(m5_op, 0, 0, exit_func) +#define INITPARAM INST(m5_op, 0, 0, initparam_func) +#define LOADSYMBOL INST(m5_op, 0, 0, loadsymbol_func) +#define RESET_STATS INST(m5_op, 0, 0, resetstats_func) +#define DUMP_STATS INST(m5_op, 0, 0, dumpstats_func) +#define DUMPRST_STATS INST(m5_op, 0, 0, dumprststats_func) +#define CHECKPOINT INST(m5_op, 0, 0, ckpt_func) #define READFILE INST(m5_op, 0, 0, readfile_func) #define DEBUGBREAK INST(m5_op, 0, 0, debugbreak_func) #define SWITCHCPU INST(m5_op, 0, 0, switchcpu_func) -#define ADDSYMBOL(r1,r2) INST(m5_op, r1, r2, addsymbol_func) +#define ADDSYMBOL INST(m5_op, 0, 0, addsymbol_func) #define PANIC INST(m5_op, 0, 0, panic_func) -#define WORK_BEGIN(r1,r2) INST(m5_op, r1, r2, work_begin_func) -#define WORK_END(r1,r2) INST(m5_op, r1, r2, work_end_func) +#define WORK_BEGIN INST(m5_op, 0, 0, work_begin_func) +#define WORK_END INST(m5_op, 0, 0, work_end_func) #define AN_BSM INST(m5_op, an_bsm, 0, annotate_func) #define AN_ESM INST(m5_op, an_esm, 0, annotate_func) @@ -106,27 +106,27 @@ func: .text -SIMPLE_OP(arm, ARM(0)) +SIMPLE_OP(arm, ARM) SIMPLE_OP(quiesce, QUIESCE) -SIMPLE_OP(quiesceNs, QUIESCENS(0)) -SIMPLE_OP(quiesceCycle, QUIESCECYC(0)) +SIMPLE_OP(quiesceNs, QUIESCENS) +SIMPLE_OP(quiesceCycle, QUIESCECYC) SIMPLE_OP(quiesceTime, QUIESCETIME) SIMPLE_OP(rpns, RPNS) -SIMPLE_OP(wakeCPU, WAKE_CPU(0)) -SIMPLE_OP(m5_exit, M5EXIT(0)) -SIMPLE_OP(m5_initparam, INITPARAM(0)) -SIMPLE_OP(m5_loadsymbol, LOADSYMBOL(0)) -SIMPLE_OP(m5_reset_stats, RESET_STATS(0, 0)) -SIMPLE_OP(m5_dump_stats, DUMP_STATS(0, 1)) -SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS(0, 1)) -SIMPLE_OP(m5_checkpoint, CHECKPOINT(0, 1)) +SIMPLE_OP(wakeCPU, WAKE_CPU) +SIMPLE_OP(m5_exit, M5EXIT) +SIMPLE_OP(m5_initparam, INITPARAM) +SIMPLE_OP(m5_loadsymbol, LOADSYMBOL) +SIMPLE_OP(m5_reset_stats, RESET_STATS) +SIMPLE_OP(m5_dump_stats, DUMP_STATS) +SIMPLE_OP(m5_dumpreset_stats, DUMPRST_STATS) +SIMPLE_OP(m5_checkpoint, CHECKPOINT) SIMPLE_OP(m5_readfile, READFILE) SIMPLE_OP(m5_debugbreak, DEBUGBREAK) SIMPLE_OP(m5_switchcpu, SWITCHCPU) -SIMPLE_OP(m5_addsymbol, ADDSYMBOL(0, 1)) +SIMPLE_OP(m5_addsymbol, ADDSYMBOL) SIMPLE_OP(m5_panic, PANIC) -SIMPLE_OP(m5_work_begin, WORK_BEGIN(0,1)) -SIMPLE_OP(m5_work_end, WORK_END(0,1)) +SIMPLE_OP(m5_work_begin, WORK_BEGIN) +SIMPLE_OP(m5_work_end, WORK_END) SIMPLE_OP(m5a_bsm, AN_BSM) SIMPLE_OP(m5a_esm, AN_ESM) |