arch,sim: Merge initCPU and startupCPU.

These two functions were called in exactly one place one right after
the other, and served similar purposes.

This change merges them together, and cleans them up slightly. It also
removes checks for FullSystem, since those functions are only called
in full system to begin with.

Change-Id: I214f7d2d3f88960dccb5895c1241f61cd78716a8
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24904
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Tested-by: kokoro <noreply+kokoro@google.com>

16 files changed, 28 insertions, 59 deletions

diff --git a/src/arch/alpha/ev5.cc b/src/arch/alpha/ev5.cc
index 29910caa6..4e2420dc9 100644
--- a/src/arch/alpha/ev5.cc
+++ b/src/arch/alpha/ev5.cc
@@ -73,11 +73,12 @@ initCPU(ThreadContext *tc, int cpuId)
     tc->setIntReg(16, cpuId);
     tc->setIntReg(0, cpuId);
 
-    AlphaFault *reset = new ResetFault;
+    Addr base = tc->readMiscRegNoEffect(IPR_PAL_BASE);
+    Addr offset = ResetFault().vect();
 
-    tc->pcState(tc->readMiscRegNoEffect(IPR_PAL_BASE) + reset->vect());
+    tc->pcState(base + offset);
 
-    delete reset;
+    tc->activate();
 }
 
 ////////////////////////////////////////////////////////////////////////
diff --git a/src/arch/alpha/utility.hh b/src/arch/alpha/utility.hh
index 46af1217e..a0f70a331 100644
--- a/src/arch/alpha/utility.hh
+++ b/src/arch/alpha/utility.hh
@@ -60,8 +60,6 @@ inUserMode(ThreadContext *tc)
 
 // Alpha IPR register accessors
 inline bool PcPAL(Addr addr) { return addr & 0x3; }
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{ tc->activate(); }
 
 ////////////////////////////////////////////////////////////////////////
 //
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc
index e3d64fadf..627fc5357 100644
--- a/src/arch/arm/utility.cc
+++ b/src/arch/arm/utility.cc
@@ -61,8 +61,8 @@ initCPU(ThreadContext *tc, int cpuId)
 
     // FPEXC.EN = 0
 
-    static Fault reset = std::make_shared<Reset>();
-    reset->invoke(tc);
+    Reset().invoke(tc);
+    tc->activate();
 }
 
 uint64_t
diff --git a/src/arch/arm/utility.hh b/src/arch/arm/utility.hh
index 538c83173..d209664cb 100644
--- a/src/arch/arm/utility.hh
+++ b/src/arch/arm/utility.hh
@@ -95,11 +95,6 @@ testPredicate(uint32_t nz, uint32_t c, uint32_t v, ConditionCode code)
     }
 }
 
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{
-    tc->activate();
-}
-
 void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 static inline void
diff --git a/src/arch/mips/utility.cc b/src/arch/mips/utility.cc
index 24c451d3e..a98b58e31 100644
--- a/src/arch/mips/utility.cc
+++ b/src/arch/mips/utility.cc
@@ -218,16 +218,12 @@ isSnan(void *val_ptr, int size)
 }
 
 void
-startupCPU(ThreadContext *tc, int cpuId)
+initCPU(ThreadContext *tc, int cpuId)
 {
     tc->activate();
 }
 
 void
-initCPU(ThreadContext *tc, int cpuId)
-{}
-
-void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
     // First loop through the integer registers.
diff --git a/src/arch/mips/utility.hh b/src/arch/mips/utility.hh
index 0cd066f3e..67fe3a45b 100644
--- a/src/arch/mips/utility.hh
+++ b/src/arch/mips/utility.hh
@@ -103,7 +103,6 @@ RoundPage(Addr addr)
 //
 // CPU Utility
 //
-void startupCPU(ThreadContext *tc, int cpuId);
 void initCPU(ThreadContext *tc, int cpuId);
 
 void copyRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/arch/null/utility.hh b/src/arch/null/utility.hh
index d92e55221..69055c706 100644
--- a/src/arch/null/utility.hh
+++ b/src/arch/null/utility.hh
@@ -43,13 +43,16 @@
 #include "base/types.hh"
 #include "cpu/thread_context.hh"
 
-namespace NullISA {
+namespace NullISA
+{
 
-inline uint64_t getArgument(ThreadContext *tc, int &number, uint16_t size,
-                            bool fp) { return 0; }
+static inline uint64_t
+getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
+{
+    return 0;
+}
 
 inline void initCPU(ThreadContext *tc, int cpuId) {}
-inline void startupCPU(ThreadContext *tc, int cpuId) {}
 
 }
 
diff --git a/src/arch/power/utility.hh b/src/arch/power/utility.hh
index b41533e65..3ae1d82f7 100644
--- a/src/arch/power/utility.hh
+++ b/src/arch/power/utility.hh
@@ -49,14 +49,7 @@ buildRetPC(const PCState &curPC, const PCState &callPC)
     return retPC;
 }
 
-inline void
-startupCPU(ThreadContext *tc, int cpuId)
-{
-    tc->activate();
-}
-
-void
-copyRegs(ThreadContext *src, ThreadContext *dest);
+void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 static inline void
 copyMiscRegs(ThreadContext *src, ThreadContext *dest)
diff --git a/src/arch/riscv/utility.cc b/src/arch/riscv/utility.cc
index 6e21a0484..949d7c66f 100644
--- a/src/arch/riscv/utility.cc
+++ b/src/arch/riscv/utility.cc
@@ -37,8 +37,8 @@ namespace RiscvISA
 
 void initCPU(ThreadContext *tc, int cpuId)
 {
-    static Fault reset = std::make_shared<Reset>();
-    reset->invoke(tc);
+    Reset().invoke(tc);
+    tc->activate();
 }
 
-}
\ No newline at end of file
+}
diff --git a/src/arch/riscv/utility.hh b/src/arch/riscv/utility.hh
index 6c0fcc130..f6e1f348a 100644
--- a/src/arch/riscv/utility.hh
+++ b/src/arch/riscv/utility.hh
@@ -117,11 +117,6 @@ getArgument(ThreadContext *tc, int &number, uint16_t size, bool fp)
     return 0;
 }
 
-inline void startupCPU(ThreadContext *tc, int cpuId)
-{
-    tc->activate();
-}
-
 inline void
 copyRegs(ThreadContext *src, ThreadContext *dest)
 {
diff --git a/src/arch/sparc/faults.hh b/src/arch/sparc/faults.hh
index 2c44d51d4..b3827fc77 100644
--- a/src/arch/sparc/faults.hh
+++ b/src/arch/sparc/faults.hh
@@ -99,7 +99,8 @@ class SparcFault : public SparcFaultBase
 
 class PowerOnReset : public SparcFault<PowerOnReset>
 {
-    void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+  public:
+    void invoke(ThreadContext *tc, const StaticInstPtr &inst =
                 StaticInst::nullStaticInstPtr);
 };
 
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
index 5b05eaf71..245f455e4 100644
--- a/src/arch/sparc/utility.cc
+++ b/src/arch/sparc/utility.cc
@@ -257,9 +257,12 @@ skipFunction(ThreadContext *tc)
 void
 initCPU(ThreadContext *tc, int cpuId)
 {
-    static Fault por = std::make_shared<PowerOnReset>();
-    if (cpuId == 0)
-        por->invoke(tc);
+    // Other CPUs will get activated by IPIs.
+    if (cpuId != 0)
+        return;
+
+    PowerOnReset().invoke(tc);
+    tc->activate();
 }
 
 } // namespace SPARC_ISA
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 48476cb04..74e0c11b8 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -64,14 +64,6 @@ inUserMode(ThreadContext *tc)
 
 void initCPU(ThreadContext *tc, int cpuId);
 
-inline void
-startupCPU(ThreadContext *tc, int cpuId)
-{
-    // Other CPUs will get activated by IPIs
-    if (cpuId == 0 || !FullSystem)
-        tc->activate();
-}
-
 void copyRegs(ThreadContext *src, ThreadContext *dest);
 
 void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/arch/x86/utility.cc b/src/arch/x86/utility.cc
index 75f242d83..21765ceae 100644
--- a/src/arch/x86/utility.cc
+++ b/src/arch/x86/utility.cc
@@ -75,11 +75,8 @@ void
 initCPU(ThreadContext *tc, int cpuId)
 {
     InitInterrupt(0).invoke(tc);
-}
 
-void startupCPU(ThreadContext *tc, int cpuId)
-{
-    if (cpuId == 0 || !FullSystem) {
+    if (cpuId == 0) {
         tc->activate();
     } else {
         // This is an application processor (AP). It should be initialized to
diff --git a/src/arch/x86/utility.hh b/src/arch/x86/utility.hh
index c88a4c777..88c7a17e4 100644
--- a/src/arch/x86/utility.hh
+++ b/src/arch/x86/utility.hh
@@ -71,8 +71,6 @@ namespace X86ISA
 
     void initCPU(ThreadContext *tc, int cpuId);
 
-    void startupCPU(ThreadContext *tc, int cpuId);
-
     void copyRegs(ThreadContext *src, ThreadContext *dest);
 
     void copyMiscRegs(ThreadContext *src, ThreadContext *dest);
diff --git a/src/sim/system.cc b/src/sim/system.cc
index e59c40477..368eb5419 100644
--- a/src/sim/system.cc
+++ b/src/sim/system.cc
@@ -349,10 +349,8 @@ void
 System::initState()
 {
     if (FullSystem) {
-        for (auto *tc: threadContexts) {
+        for (auto *tc: threadContexts)
             TheISA::initCPU(tc, tc->contextId());
-            TheISA::startupCPU(tc, tc->contextId());
-        }
         // Moved from the constructor to here since it relies on the
         // address map being resolved in the interconnect
         /**