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authorClint Smullen <cws3k@cs.virginia.edu>2008-10-27 18:18:04 -0400
committerClint Smullen <cws3k@cs.virginia.edu>2008-10-27 18:18:04 -0400
commit95af120e601671e6819ca97b78a1879d4ab0d853 (patch)
treef435a1dcfe541e7267c41fcd1bf33619eef9a3fa
parentcfa32d8de737847f04bfa6e5e89375c870c3869b (diff)
downloadgem5-95af120e601671e6819ca97b78a1879d4ab0d853.tar.xz
CPU: The API change to EventWrapper did not get propagated to the entirety of TimingSimpleCPU.
The constructor no-longer schedules an event at construction and the implict conversion between int and bool was allowing the old code to compile without warning. Signed-off By: Ali Saidi
-rw-r--r--src/cpu/simple/timing.cc17
-rw-r--r--src/cpu/simple/timing.hh2
2 files changed, 6 insertions, 13 deletions
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 0cda9a0a3..a6059f55f 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -105,7 +105,7 @@ TimingSimpleCPU::CpuPort::TickEvent::schedule(PacketPtr _pkt, Tick t)
}
TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p)
- : BaseSimpleCPU(p), icachePort(this, p->clock), dcachePort(this, p->clock)
+ : BaseSimpleCPU(p), icachePort(this, p->clock), dcachePort(this, p->clock), fetchEvent(this)
{
_status = Idle;
@@ -114,7 +114,6 @@ TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p)
ifetch_pkt = dcache_pkt = NULL;
drainEvent = NULL;
- fetchEvent = NULL;
previousTick = 0;
changeState(SimObject::Running);
}
@@ -162,15 +161,10 @@ TimingSimpleCPU::resume()
if (_status != SwitchedOut && _status != Idle) {
assert(system->getMemoryMode() == Enums::timing);
- // Delete the old event if it existed.
- if (fetchEvent) {
- if (fetchEvent->scheduled())
- deschedule(fetchEvent);
+ if (fetchEvent.scheduled())
+ deschedule(fetchEvent);
- delete fetchEvent;
- }
-
- fetchEvent = new FetchEvent(this, nextCycle());
+ schedule(fetchEvent, nextCycle());
}
changeState(SimObject::Running);
@@ -185,7 +179,7 @@ TimingSimpleCPU::switchOut()
// If we've been scheduled to resume but are then told to switch out,
// we'll need to cancel it.
- if (fetchEvent && fetchEvent->scheduled())
+ if (fetchEvent.scheduled())
deschedule(fetchEvent);
}
@@ -228,7 +222,6 @@ TimingSimpleCPU::activateContext(int thread_num, int delay)
_status = Running;
// kick things off by initiating the fetch of the next instruction
- fetchEvent = new FetchEvent(this);
schedule(fetchEvent, nextCycle(curTick + ticks(delay)));
}
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index 081051ea7..0fc9b3152 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -192,7 +192,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
private:
typedef EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch> FetchEvent;
- FetchEvent *fetchEvent;
+ FetchEvent fetchEvent;
struct IprEvent : Event {
Packet *pkt;