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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-23 14:34:20 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-09-06 11:53:49 +0000 |
| commit | cad88af5bd731386201c9548ae0264640e17f3b0 (patch) | |
| tree | 92a4945a6dafd8bfcc6ff69f3ae08b99b6d3876d | |
| parent | 3093d65ad37a820681ea88cbb70c2e70c4b1957c (diff) | |
| download | gem5-cad88af5bd731386201c9548ae0264640e17f3b0.tar.xz | |
dev-arm: Writing GICD_CTLR should trigger an update
This is the case where an interrupt is pending, but the distributor is
masking it. As soon as the group gets enabled, the interrupt should be
forwarded to the PE.
Change-Id: Ie428780bde7e4726688adf78dfcc4d43d1b45261
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20615
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
| -rw-r--r-- | src/dev/arm/gic_v3_distributor.cc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/dev/arm/gic_v3_distributor.cc b/src/dev/arm/gic_v3_distributor.cc index 0211bec56..374a4636d 100644 --- a/src/dev/arm/gic_v3_distributor.cc +++ b/src/dev/arm/gic_v3_distributor.cc @@ -932,6 +932,8 @@ Gicv3Distributor::write(Addr addr, uint64_t data, size_t size, } } + update(); + break; default: |