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author | Andreas Sandberg <andreas.sandberg@arm.com> | 2019-01-28 16:53:47 +0000 |
---|---|---|
committer | Andreas Sandberg <andreas.sandberg@arm.com> | 2019-02-25 14:24:08 +0000 |
commit | debb5daace15e17bae7c07937852f6f738633c85 (patch) | |
tree | c8b2f5e12bcf65633f1e9df949cd04bcdfae7a21 | |
parent | d63f735663d710839f79a4b88af67da968995168 (diff) | |
download | gem5-debb5daace15e17bae7c07937852f6f738633c85.tar.xz |
tests: Update test scripts to work with Python 3
Change-Id: I71b1e595765fed9e9f234c9722c33ac5348d4f11
Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/15999
Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com>
-rw-r--r-- | tests/configs/base_config.py | 2 | ||||
-rw-r--r-- | tests/configs/gpu-ruby.py | 12 | ||||
-rw-r--r-- | tests/configs/memtest-filter.py | 2 | ||||
-rw-r--r-- | tests/configs/memtest-ruby.py | 2 | ||||
-rw-r--r-- | tests/configs/memtest.py | 2 | ||||
-rw-r--r-- | tests/configs/o3-timing-mp-ruby.py | 2 | ||||
-rw-r--r-- | tests/configs/pc-simple-timing-ruby.py | 2 | ||||
-rw-r--r-- | tests/configs/simple-atomic-mp-ruby.py | 2 | ||||
-rw-r--r-- | tests/configs/simple-timing-mp-ruby.py | 2 | ||||
-rw-r--r-- | tests/configs/t1000-simple-atomic.py | 2 | ||||
-rw-r--r-- | tests/legacy-configs/run.py | 2 | ||||
-rw-r--r-- | tests/run.py | 8 |
12 files changed, 22 insertions, 18 deletions
diff --git a/tests/configs/base_config.py b/tests/configs/base_config.py index e09963314..2bed5f661 100644 --- a/tests/configs/base_config.py +++ b/tests/configs/base_config.py @@ -288,7 +288,7 @@ class BaseFSSystem(BaseSystem): response_latency = 20, tgts_per_mshr = 8) for r in system.mem_ranges] - for i in xrange(len(system.physmem)): + for i in range(len(system.physmem)): system.physmem[i].port = system.llc[i].mem_side system.llc[i].cpu_side = system.membus.master diff --git a/tests/configs/gpu-ruby.py b/tests/configs/gpu-ruby.py index e846dbaf6..155775a0b 100644 --- a/tests/configs/gpu-ruby.py +++ b/tests/configs/gpu-ruby.py @@ -197,7 +197,7 @@ if options.TLB_config == "perLane": # List of compute units; one GPU can have multiple compute units compute_units = [] -for i in xrange(n_cu): +for i in range(n_cu): compute_units.append(ComputeUnit(cu_id = i, perLaneTLB = per_lane, num_SIMDs = options.simds_per_cu, wfSize = options.wf_size, @@ -227,8 +227,8 @@ for i in xrange(n_cu): options.ldsBankConflictPenalty))) wavefronts = [] vrfs = [] - for j in xrange(options.simds_per_cu): - for k in xrange(shader.n_wf): + for j in range(options.simds_per_cu): + for k in range(int(shader.n_wf)): wavefronts.append(Wavefront(simdId = j, wf_slot_id = k)) vrfs.append(VectorRegisterFile(simd_id=j, num_regs_per_simd=options.vreg_file_size)) @@ -308,15 +308,15 @@ gpu_port_idx = len(system.ruby._cpu_ports) \ gpu_port_idx = gpu_port_idx - options.num_cp * 2 wavefront_size = options.wf_size -for i in xrange(n_cu): +for i in range(n_cu): # The pipeline issues wavefront_size number of uncoalesced requests # in one GPU issue cycle. Hence wavefront_size mem ports. - for j in xrange(wavefront_size): + for j in range(wavefront_size): system.cpu[shader_idx].CUs[i].memory_port[j] = \ system.ruby._cpu_ports[gpu_port_idx].slave[j] gpu_port_idx += 1 -for i in xrange(n_cu): +for i in range(n_cu): if i > 0 and not i % options.cu_per_sqc: gpu_port_idx += 1 system.cpu[shader_idx].CUs[i].sqc_port = \ diff --git a/tests/configs/memtest-filter.py b/tests/configs/memtest-filter.py index 90ad0421c..56297d2d9 100644 --- a/tests/configs/memtest-filter.py +++ b/tests/configs/memtest-filter.py @@ -33,7 +33,7 @@ from common.Caches import * #MAX CORES IS 8 with the fals sharing method nb_cores = 8 -cpus = [ MemTest() for i in xrange(nb_cores) ] +cpus = [ MemTest() for i in range(nb_cores) ] # system simulated system = System(cpu = cpus, diff --git a/tests/configs/memtest-ruby.py b/tests/configs/memtest-ruby.py index 9cf92af63..5947c8061 100644 --- a/tests/configs/memtest-ruby.py +++ b/tests/configs/memtest-ruby.py @@ -66,7 +66,7 @@ nb_cores = 8 # ruby does not support atomic, functional, or uncacheable accesses cpus = [ MemTest(percent_functional=50, percent_uncacheable=0, suppress_func_warnings=True) \ - for i in xrange(nb_cores) ] + for i in range(nb_cores) ] # overwrite options.num_cpus with the nb_cores value options.num_cpus = nb_cores diff --git a/tests/configs/memtest.py b/tests/configs/memtest.py index db7a5ef22..959ec4e5d 100644 --- a/tests/configs/memtest.py +++ b/tests/configs/memtest.py @@ -33,7 +33,7 @@ from common.Caches import * #MAX CORES IS 8 with the fals sharing method nb_cores = 8 -cpus = [ MemTest() for i in xrange(nb_cores) ] +cpus = [ MemTest() for i in range(nb_cores) ] # system simulated system = System(cpu = cpus, diff --git a/tests/configs/o3-timing-mp-ruby.py b/tests/configs/o3-timing-mp-ruby.py index 9248b08fb..90319d1f0 100644 --- a/tests/configs/o3-timing-mp-ruby.py +++ b/tests/configs/o3-timing-mp-ruby.py @@ -30,7 +30,7 @@ import m5 from m5.objects import * nb_cores = 4 -cpus = [ DerivO3CPU(cpu_id=i) for i in xrange(nb_cores) ] +cpus = [ DerivO3CPU(cpu_id=i) for i in range(nb_cores) ] import ruby_config ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores) diff --git a/tests/configs/pc-simple-timing-ruby.py b/tests/configs/pc-simple-timing-ruby.py index 19c38dc32..18c990930 100644 --- a/tests/configs/pc-simple-timing-ruby.py +++ b/tests/configs/pc-simple-timing-ruby.py @@ -63,7 +63,7 @@ system.clk_domain = SrcClockDomain(clock = '1GHz', system.cpu_clk_domain = SrcClockDomain(clock = '2GHz', voltage_domain = system.voltage_domain) system.cpu = [TimingSimpleCPU(cpu_id=i, clk_domain = system.cpu_clk_domain) - for i in xrange(options.num_cpus)] + for i in range(options.num_cpus)] Ruby.create_system(options, True, system, system.iobus, system._dma_ports) diff --git a/tests/configs/simple-atomic-mp-ruby.py b/tests/configs/simple-atomic-mp-ruby.py index e43590741..52cba7d2b 100644 --- a/tests/configs/simple-atomic-mp-ruby.py +++ b/tests/configs/simple-atomic-mp-ruby.py @@ -30,7 +30,7 @@ import m5 from m5.objects import * nb_cores = 4 -cpus = [ AtomicSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ] +cpus = [ AtomicSimpleCPU(cpu_id=i) for i in range(nb_cores) ] import ruby_config ruby_memory = ruby_config.generate("TwoLevel_SplitL1UnifiedL2.rb", nb_cores) diff --git a/tests/configs/simple-timing-mp-ruby.py b/tests/configs/simple-timing-mp-ruby.py index 248d04654..52d7df991 100644 --- a/tests/configs/simple-timing-mp-ruby.py +++ b/tests/configs/simple-timing-mp-ruby.py @@ -59,7 +59,7 @@ options.l2_assoc=2 options.l3_assoc=2 nb_cores = 4 -cpus = [ TimingSimpleCPU(cpu_id=i) for i in xrange(nb_cores) ] +cpus = [ TimingSimpleCPU(cpu_id=i) for i in range(nb_cores) ] # overwrite the num_cpus to equal nb_cores options.num_cpus = nb_cores diff --git a/tests/configs/t1000-simple-atomic.py b/tests/configs/t1000-simple-atomic.py index 0d971a054..ea906b317 100644 --- a/tests/configs/t1000-simple-atomic.py +++ b/tests/configs/t1000-simple-atomic.py @@ -51,7 +51,7 @@ cpu.connectAllPorts(system.membus) # the physmem name to avoid bumping all the reference stats system.physmem = [SimpleMemory(range = r) for r in system.mem_ranges] -for i in xrange(len(system.physmem)): +for i in range(len(system.physmem)): system.physmem[i].port = system.membus.master root = Root(full_system=True, system=system) diff --git a/tests/legacy-configs/run.py b/tests/legacy-configs/run.py index 3eac49095..47b5ab749 100644 --- a/tests/legacy-configs/run.py +++ b/tests/legacy-configs/run.py @@ -85,7 +85,7 @@ args = parser.parse_args() executable = args.executable for config in args.config: - execfile(config) + exec(compile(open(config).read(), config, 'exec')) # Initialize all CPUs in a system def initCPUs(sys): diff --git a/tests/run.py b/tests/run.py index 93ea82edd..6e4b45311 100644 --- a/tests/run.py +++ b/tests/run.py @@ -209,7 +209,9 @@ test_filename = config # for ruby configurations, remove the protocol name from the test filename if re.search('-ruby', test_filename): test_filename = test_filename.split('-ruby')[0]+'-ruby' -execfile(joinpath(tests_root, 'configs', test_filename + '.py')) +exec(compile( \ + open(joinpath(tests_root, 'configs', test_filename + '.py')).read(), \ + joinpath(tests_root, 'configs', test_filename + '.py'), 'exec')) # set default maxtick... script can override # -1 means run forever @@ -217,7 +219,9 @@ maxtick = m5.MaxTick # tweak configuration for specific test sys.path.append(joinpath(tests_root, category, mode, name)) -execfile(joinpath(tests_root, category, mode, name, 'test.py')) +exec(compile( \ + open(joinpath(tests_root, category, mode, name, 'test.py')).read(), \ + joinpath(tests_root, category, mode, name, 'test.py'), 'exec')) # Initialize all CPUs in a system def initCPUs(sys): |