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authorSteve Reinhardt <stever@eecs.umich.edu>2006-01-29 17:35:53 -0500
committerSteve Reinhardt <stever@eecs.umich.edu>2006-01-29 17:35:53 -0500
commit0e79d188e1437d313f28bf6ee808b92ae0ce03a6 (patch)
tree5de454c80cb606c0a15bd239656c8d19cc82817f
parent07948528fcd38a3588c819a5176fc4902c0540a5 (diff)
downloadgem5-0e79d188e1437d313f28bf6ee808b92ae0ce03a6.tar.xz
Hacks to avoid compiling in old FullCPU model.
Needed in the interim until we port the old model over to the new interface. Long term we should have a cleaner solution for controlling which models get compiled in. SConscript: Move old FullCPU source file list to separate full_cpu_sources list so we can choose to not include it in compile. arch/isa_parser.py: Hack to avoid generating FullCPU execute files. Need a better way to control this. cpu/exetrace.cc: Don't include old FullCPU-specific headers (apparently unnecessary anyway--or if not they should be). --HG-- extra : convert_revision : 00d5a91a9e4d71507404b8c7f4c6e7c7b7ba3853
-rw-r--r--SConscript77
-rwxr-xr-xarch/isa_parser.py6
-rw-r--r--cpu/exetrace.cc3
3 files changed, 42 insertions, 44 deletions
diff --git a/SConscript b/SConscript
index e49a3a726..042e36784 100644
--- a/SConscript
+++ b/SConscript
@@ -48,7 +48,6 @@ base_sources = Split('''
arch/alpha/alpha_o3_exec.cc
arch/alpha/fast_cpu_exec.cc
arch/alpha/simple_cpu_exec.cc
- arch/alpha/full_cpu_exec.cc
arch/alpha/faults.cc
arch/alpha/isa_traits.cc
@@ -125,41 +124,6 @@ base_sources = Split('''
cpu/trace/opt_cpu.cc
cpu/trace/trace_cpu.cc
- encumbered/cpu/full/bpred.cc
- encumbered/cpu/full/commit.cc
- encumbered/cpu/full/cpu.cc
- encumbered/cpu/full/create_vector.cc
- encumbered/cpu/full/cv_spec_state.cc
- encumbered/cpu/full/dd_queue.cc
- encumbered/cpu/full/dep_link.cc
- encumbered/cpu/full/dispatch.cc
- encumbered/cpu/full/dyn_inst.cc
- encumbered/cpu/full/execute.cc
- encumbered/cpu/full/fetch.cc
- encumbered/cpu/full/floss_reasons.cc
- encumbered/cpu/full/fu_pool.cc
- encumbered/cpu/full/inst_fifo.cc
- encumbered/cpu/full/instpipe.cc
- encumbered/cpu/full/issue.cc
- encumbered/cpu/full/ls_queue.cc
- encumbered/cpu/full/machine_queue.cc
- encumbered/cpu/full/pipetrace.cc
- encumbered/cpu/full/readyq.cc
- encumbered/cpu/full/reg_info.cc
- encumbered/cpu/full/rob_station.cc
- encumbered/cpu/full/spec_memory.cc
- encumbered/cpu/full/spec_state.cc
- encumbered/cpu/full/storebuffer.cc
- encumbered/cpu/full/writeback.cc
- encumbered/cpu/full/iq/iq_station.cc
- encumbered/cpu/full/iq/iqueue.cc
- encumbered/cpu/full/iq/segmented/chain_info.cc
- encumbered/cpu/full/iq/segmented/chain_wire.cc
- encumbered/cpu/full/iq/segmented/iq_seg.cc
- encumbered/cpu/full/iq/segmented/iq_segmented.cc
- encumbered/cpu/full/iq/segmented/seg_chain.cc
- encumbered/cpu/full/iq/seznec/iq_seznec.cc
- encumbered/cpu/full/iq/standard/iq_standard.cc
encumbered/mem/functional/main.cc
mem/base_hier.cc
@@ -234,6 +198,44 @@ base_sources = Split('''
sim/trace_context.cc
''')
+full_cpu_sources = Split('''
+ arch/alpha/full_cpu_exec.cc
+ encumbered/cpu/full/bpred.cc
+ encumbered/cpu/full/commit.cc
+ encumbered/cpu/full/cpu.cc
+ encumbered/cpu/full/create_vector.cc
+ encumbered/cpu/full/cv_spec_state.cc
+ encumbered/cpu/full/dd_queue.cc
+ encumbered/cpu/full/dep_link.cc
+ encumbered/cpu/full/dispatch.cc
+ encumbered/cpu/full/dyn_inst.cc
+ encumbered/cpu/full/execute.cc
+ encumbered/cpu/full/fetch.cc
+ encumbered/cpu/full/floss_reasons.cc
+ encumbered/cpu/full/inst_fifo.cc
+ encumbered/cpu/full/instpipe.cc
+ encumbered/cpu/full/issue.cc
+ encumbered/cpu/full/ls_queue.cc
+ encumbered/cpu/full/machine_queue.cc
+ encumbered/cpu/full/pipetrace.cc
+ encumbered/cpu/full/readyq.cc
+ encumbered/cpu/full/reg_info.cc
+ encumbered/cpu/full/rob_station.cc
+ encumbered/cpu/full/spec_memory.cc
+ encumbered/cpu/full/spec_state.cc
+ encumbered/cpu/full/storebuffer.cc
+ encumbered/cpu/full/writeback.cc
+ encumbered/cpu/full/iq/iq_station.cc
+ encumbered/cpu/full/iq/iqueue.cc
+ encumbered/cpu/full/iq/segmented/chain_info.cc
+ encumbered/cpu/full/iq/segmented/chain_wire.cc
+ encumbered/cpu/full/iq/segmented/iq_seg.cc
+ encumbered/cpu/full/iq/segmented/iq_segmented.cc
+ encumbered/cpu/full/iq/segmented/seg_chain.cc
+ encumbered/cpu/full/iq/seznec/iq_seznec.cc
+ encumbered/cpu/full/iq/standard/iq_standard.cc
+ ''')
+
# MySql sources
mysql_sources = Split('''
base/mysql.cc
@@ -393,8 +395,7 @@ env.Command(Split('''arch/alpha/decoder.cc
arch/alpha/decoder.hh
arch/alpha/alpha_o3_exec.cc
arch/alpha/fast_cpu_exec.cc
- arch/alpha/simple_cpu_exec.cc
- arch/alpha/full_cpu_exec.cc'''),
+ arch/alpha/simple_cpu_exec.cc'''),
Split('''arch/alpha/isa_desc
arch/isa_parser.py'''),
'$SRCDIR/arch/isa_parser.py $SOURCE $TARGET.dir arch/alpha')
diff --git a/arch/isa_parser.py b/arch/isa_parser.py
index 8f4c6bce7..21a2ce696 100755
--- a/arch/isa_parser.py
+++ b/arch/isa_parser.py
@@ -636,9 +636,9 @@ CpuModel('SimpleCPU', 'simple_cpu_exec.cc',
CpuModel('FastCPU', 'fast_cpu_exec.cc',
'#include "cpu/fast/cpu.hh"',
{ 'CPU_exec_context': 'FastCPU' })
-CpuModel('FullCPU', 'full_cpu_exec.cc',
- '#include "encumbered/cpu/full/dyn_inst.hh"',
- { 'CPU_exec_context': 'DynInst' })
+#CpuModel('FullCPU', 'full_cpu_exec.cc',
+# '#include "encumbered/cpu/full/dyn_inst.hh"',
+# { 'CPU_exec_context': 'DynInst' })
CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc',
'#include "cpu/o3/alpha_dyn_inst.hh"',
{ 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' })
diff --git a/cpu/exetrace.cc b/cpu/exetrace.cc
index 8393a1b85..5c7dc953c 100644
--- a/cpu/exetrace.cc
+++ b/cpu/exetrace.cc
@@ -30,9 +30,6 @@
#include <iomanip>
#include "sim/param.hh"
-#include "encumbered/cpu/full/dyn_inst.hh"
-#include "encumbered/cpu/full/spec_state.hh"
-#include "encumbered/cpu/full/issue.hh"
#include "cpu/exetrace.hh"
#include "cpu/exec_context.hh"
#include "base/loader/symtab.hh"