diff options
author | Nathan Binkert <binkertn@umich.edu> | 2005-06-04 20:50:10 -0400 |
---|---|---|
committer | Nathan Binkert <binkertn@umich.edu> | 2005-06-04 20:50:10 -0400 |
commit | 13c005a8af79a8481879ce099b45a1f98faae165 (patch) | |
tree | 3125dfe10539270433981b39119dd727295c255c | |
parent | 5a94e6f2cc6ed8480063da68d20274ced2930925 (diff) | |
download | gem5-13c005a8af79a8481879ce099b45a1f98faae165.tar.xz |
shuffle files around for new directory structure
--HG--
rename : cpu/base_cpu.cc => cpu/base.cc
rename : cpu/base_cpu.hh => cpu/base.hh
rename : cpu/beta_cpu/2bit_local_pred.cc => cpu/o3/2bit_local_pred.cc
rename : cpu/beta_cpu/2bit_local_pred.hh => cpu/o3/2bit_local_pred.hh
rename : cpu/beta_cpu/alpha_full_cpu.cc => cpu/o3/alpha_cpu.cc
rename : cpu/beta_cpu/alpha_full_cpu.hh => cpu/o3/alpha_cpu.hh
rename : cpu/beta_cpu/alpha_full_cpu_builder.cc => cpu/o3/alpha_cpu_builder.cc
rename : cpu/beta_cpu/alpha_full_cpu_impl.hh => cpu/o3/alpha_cpu_impl.hh
rename : cpu/beta_cpu/alpha_dyn_inst.cc => cpu/o3/alpha_dyn_inst.cc
rename : cpu/beta_cpu/alpha_dyn_inst.hh => cpu/o3/alpha_dyn_inst.hh
rename : cpu/beta_cpu/alpha_dyn_inst_impl.hh => cpu/o3/alpha_dyn_inst_impl.hh
rename : cpu/beta_cpu/alpha_impl.hh => cpu/o3/alpha_impl.hh
rename : cpu/beta_cpu/alpha_params.hh => cpu/o3/alpha_params.hh
rename : cpu/beta_cpu/bpred_unit.cc => cpu/o3/bpred_unit.cc
rename : cpu/beta_cpu/bpred_unit.hh => cpu/o3/bpred_unit.hh
rename : cpu/beta_cpu/bpred_unit_impl.hh => cpu/o3/bpred_unit_impl.hh
rename : cpu/beta_cpu/btb.cc => cpu/o3/btb.cc
rename : cpu/beta_cpu/btb.hh => cpu/o3/btb.hh
rename : cpu/beta_cpu/comm.hh => cpu/o3/comm.hh
rename : cpu/beta_cpu/commit.cc => cpu/o3/commit.cc
rename : cpu/beta_cpu/commit.hh => cpu/o3/commit.hh
rename : cpu/beta_cpu/commit_impl.hh => cpu/o3/commit_impl.hh
rename : cpu/beta_cpu/full_cpu.cc => cpu/o3/cpu.cc
rename : cpu/beta_cpu/full_cpu.hh => cpu/o3/cpu.hh
rename : cpu/beta_cpu/cpu_policy.hh => cpu/o3/cpu_policy.hh
rename : cpu/beta_cpu/decode.cc => cpu/o3/decode.cc
rename : cpu/beta_cpu/decode.hh => cpu/o3/decode.hh
rename : cpu/beta_cpu/decode_impl.hh => cpu/o3/decode_impl.hh
rename : cpu/beta_cpu/fetch.cc => cpu/o3/fetch.cc
rename : cpu/beta_cpu/fetch.hh => cpu/o3/fetch.hh
rename : cpu/beta_cpu/fetch_impl.hh => cpu/o3/fetch_impl.hh
rename : cpu/beta_cpu/free_list.cc => cpu/o3/free_list.cc
rename : cpu/beta_cpu/free_list.hh => cpu/o3/free_list.hh
rename : cpu/beta_cpu/iew.cc => cpu/o3/iew.cc
rename : cpu/beta_cpu/iew.hh => cpu/o3/iew.hh
rename : cpu/beta_cpu/iew_impl.hh => cpu/o3/iew_impl.hh
rename : cpu/beta_cpu/inst_queue.cc => cpu/o3/inst_queue.cc
rename : cpu/beta_cpu/inst_queue.hh => cpu/o3/inst_queue.hh
rename : cpu/beta_cpu/inst_queue_impl.hh => cpu/o3/inst_queue_impl.hh
rename : cpu/beta_cpu/mem_dep_unit.cc => cpu/o3/mem_dep_unit.cc
rename : cpu/beta_cpu/mem_dep_unit.hh => cpu/o3/mem_dep_unit.hh
rename : cpu/beta_cpu/mem_dep_unit_impl.hh => cpu/o3/mem_dep_unit_impl.hh
rename : cpu/beta_cpu/ras.cc => cpu/o3/ras.cc
rename : cpu/beta_cpu/ras.hh => cpu/o3/ras.hh
rename : cpu/beta_cpu/regfile.hh => cpu/o3/regfile.hh
rename : cpu/beta_cpu/rename.cc => cpu/o3/rename.cc
rename : cpu/beta_cpu/rename.hh => cpu/o3/rename.hh
rename : cpu/beta_cpu/rename_impl.hh => cpu/o3/rename_impl.hh
rename : cpu/beta_cpu/rename_map.cc => cpu/o3/rename_map.cc
rename : cpu/beta_cpu/rename_map.hh => cpu/o3/rename_map.hh
rename : cpu/beta_cpu/rob.cc => cpu/o3/rob.cc
rename : cpu/beta_cpu/rob.hh => cpu/o3/rob.hh
rename : cpu/beta_cpu/rob_impl.hh => cpu/o3/rob_impl.hh
rename : cpu/beta_cpu/sat_counter.cc => cpu/o3/sat_counter.cc
rename : cpu/beta_cpu/sat_counter.hh => cpu/o3/sat_counter.hh
rename : cpu/beta_cpu/store_set.cc => cpu/o3/store_set.cc
rename : cpu/beta_cpu/store_set.hh => cpu/o3/store_set.hh
rename : cpu/beta_cpu/tournament_pred.cc => cpu/o3/tournament_pred.cc
rename : cpu/beta_cpu/tournament_pred.hh => cpu/o3/tournament_pred.hh
rename : cpu/ooo_cpu/ooo_cpu.cc => cpu/ozone/cpu.cc
rename : cpu/ooo_cpu/ooo_cpu.hh => cpu/ozone/cpu.hh
rename : cpu/ooo_cpu/ooo_impl.hh => cpu/ozone/cpu_impl.hh
rename : cpu/ooo_cpu/ea_list.cc => cpu/ozone/ea_list.cc
rename : cpu/ooo_cpu/ea_list.hh => cpu/ozone/ea_list.hh
rename : cpu/simple_cpu/simple_cpu.cc => cpu/simple/cpu.cc
rename : cpu/simple_cpu/simple_cpu.hh => cpu/simple/cpu.hh
rename : cpu/full_cpu/smt.hh => cpu/smt.hh
rename : cpu/full_cpu/op_class.hh => encumbered/cpu/full/op_class.hh
extra : convert_revision : c4a891d8d6d3e0e9e5ea56be47d851da44d8c032
-rw-r--r-- | SConscript | 176 | ||||
-rw-r--r-- | arch/alpha/alpha_linux_process.cc | 4 | ||||
-rw-r--r-- | arch/alpha/alpha_tru64_process.cc | 4 | ||||
-rw-r--r-- | arch/alpha/arguments.cc | 2 | ||||
-rw-r--r-- | arch/alpha/ev5.cc | 4 | ||||
-rw-r--r-- | arch/alpha/isa_desc | 2 | ||||
-rw-r--r-- | arch/alpha/pseudo_inst.cc | 4 | ||||
-rw-r--r-- | arch/alpha/vtophys.cc | 2 | ||||
-rwxr-xr-x | arch/isa_parser.py | 10 | ||||
-rw-r--r-- | base/loader/aout_object.cc | 2 | ||||
-rw-r--r-- | base/loader/ecoff_object.cc | 2 | ||||
-rw-r--r-- | base/loader/elf_object.cc | 2 | ||||
-rw-r--r-- | base/remote_gdb.cc | 12 | ||||
-rw-r--r-- | cpu/base.cc (renamed from cpu/base_cpu.cc) | 4 | ||||
-rw-r--r-- | cpu/base.hh (renamed from cpu/base_cpu.hh) | 8 | ||||
-rw-r--r-- | cpu/base_dyn_inst.cc | 4 | ||||
-rw-r--r-- | cpu/base_dyn_inst.hh | 13 | ||||
-rw-r--r-- | cpu/beta_cpu/rob.cc | 7 | ||||
-rw-r--r-- | cpu/exec_context.cc | 2 | ||||
-rw-r--r-- | cpu/exec_context.hh | 10 | ||||
-rw-r--r-- | cpu/exetrace.cc | 8 | ||||
-rw-r--r-- | cpu/intr_control.cc | 2 | ||||
-rw-r--r-- | cpu/intr_control.hh | 2 | ||||
-rw-r--r-- | cpu/memtest/memtest.cc | 1 | ||||
-rw-r--r-- | cpu/memtest/memtest.hh | 2 | ||||
-rw-r--r-- | cpu/o3/2bit_local_pred.cc (renamed from cpu/beta_cpu/2bit_local_pred.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/2bit_local_pred.hh (renamed from cpu/beta_cpu/2bit_local_pred.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/alpha_cpu.cc (renamed from cpu/beta_cpu/alpha_full_cpu.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/alpha_cpu.hh (renamed from cpu/beta_cpu/alpha_full_cpu.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/alpha_cpu_builder.cc (renamed from cpu/beta_cpu/alpha_full_cpu_builder.cc) | 18 | ||||
-rw-r--r-- | cpu/o3/alpha_cpu_impl.hh (renamed from cpu/beta_cpu/alpha_full_cpu_impl.hh) | 6 | ||||
-rw-r--r-- | cpu/o3/alpha_dyn_inst.cc (renamed from cpu/beta_cpu/alpha_dyn_inst.cc) | 4 | ||||
-rw-r--r-- | cpu/o3/alpha_dyn_inst.hh (renamed from cpu/beta_cpu/alpha_dyn_inst.hh) | 4 | ||||
-rw-r--r-- | cpu/o3/alpha_dyn_inst_impl.hh (renamed from cpu/beta_cpu/alpha_dyn_inst_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/alpha_impl.hh (renamed from cpu/beta_cpu/alpha_impl.hh) | 4 | ||||
-rw-r--r-- | cpu/o3/alpha_params.hh (renamed from cpu/beta_cpu/alpha_params.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/bpred_unit.cc (renamed from cpu/beta_cpu/bpred_unit.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/bpred_unit.hh (renamed from cpu/beta_cpu/bpred_unit.hh) | 8 | ||||
-rw-r--r-- | cpu/o3/bpred_unit_impl.hh (renamed from cpu/beta_cpu/bpred_unit_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/btb.cc (renamed from cpu/beta_cpu/btb.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/btb.hh (renamed from cpu/beta_cpu/btb.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/comm.hh (renamed from cpu/beta_cpu/comm.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/commit.cc (renamed from cpu/beta_cpu/commit.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/commit.hh (renamed from cpu/beta_cpu/commit.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/commit_impl.hh (renamed from cpu/beta_cpu/commit_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/cpu.cc (renamed from cpu/beta_cpu/full_cpu.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/cpu.hh (renamed from cpu/beta_cpu/full_cpu.hh) | 6 | ||||
-rw-r--r-- | cpu/o3/cpu_policy.hh (renamed from cpu/beta_cpu/cpu_policy.hh) | 30 | ||||
-rw-r--r-- | cpu/o3/decode.cc (renamed from cpu/beta_cpu/decode.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/decode.hh (renamed from cpu/beta_cpu/decode.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/decode_impl.hh (renamed from cpu/beta_cpu/decode_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/fetch.cc (renamed from cpu/beta_cpu/fetch.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/fetch.hh (renamed from cpu/beta_cpu/fetch.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/fetch_impl.hh (renamed from cpu/beta_cpu/fetch_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/free_list.cc (renamed from cpu/beta_cpu/free_list.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/free_list.hh (renamed from cpu/beta_cpu/free_list.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/iew.cc (renamed from cpu/beta_cpu/iew.cc) | 8 | ||||
-rw-r--r-- | cpu/o3/iew.hh (renamed from cpu/beta_cpu/iew.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/iew_impl.hh (renamed from cpu/beta_cpu/iew_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/inst_queue.cc (renamed from cpu/beta_cpu/inst_queue.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/inst_queue.hh (renamed from cpu/beta_cpu/inst_queue.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/inst_queue_impl.hh (renamed from cpu/beta_cpu/inst_queue_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/mem_dep_unit.cc (renamed from cpu/beta_cpu/mem_dep_unit.cc) | 8 | ||||
-rw-r--r-- | cpu/o3/mem_dep_unit.hh (renamed from cpu/beta_cpu/mem_dep_unit.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/mem_dep_unit_impl.hh (renamed from cpu/beta_cpu/mem_dep_unit_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/ras.cc (renamed from cpu/beta_cpu/ras.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/ras.hh (renamed from cpu/beta_cpu/ras.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/regfile.hh (renamed from cpu/beta_cpu/regfile.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/rename.cc (renamed from cpu/beta_cpu/rename.cc) | 6 | ||||
-rw-r--r-- | cpu/o3/rename.hh (renamed from cpu/beta_cpu/rename.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/rename_impl.hh (renamed from cpu/beta_cpu/rename_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/rename_map.cc (renamed from cpu/beta_cpu/rename_map.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/rename_map.hh (renamed from cpu/beta_cpu/rename_map.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/rob.cc | 7 | ||||
-rw-r--r-- | cpu/o3/rob.hh (renamed from cpu/beta_cpu/rob.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/rob_impl.hh (renamed from cpu/beta_cpu/rob_impl.hh) | 2 | ||||
-rw-r--r-- | cpu/o3/sat_counter.cc (renamed from cpu/beta_cpu/sat_counter.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/sat_counter.hh (renamed from cpu/beta_cpu/sat_counter.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/store_set.cc (renamed from cpu/beta_cpu/store_set.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/store_set.hh (renamed from cpu/beta_cpu/store_set.hh) | 0 | ||||
-rw-r--r-- | cpu/o3/tournament_pred.cc (renamed from cpu/beta_cpu/tournament_pred.cc) | 2 | ||||
-rw-r--r-- | cpu/o3/tournament_pred.hh (renamed from cpu/beta_cpu/tournament_pred.hh) | 2 | ||||
-rw-r--r-- | cpu/ozone/cpu.cc (renamed from cpu/ooo_cpu/ooo_cpu.cc) | 0 | ||||
-rw-r--r-- | cpu/ozone/cpu.hh (renamed from cpu/ooo_cpu/ooo_cpu.hh) | 4 | ||||
-rw-r--r-- | cpu/ozone/cpu_impl.hh (renamed from cpu/ooo_cpu/ooo_impl.hh) | 0 | ||||
-rw-r--r-- | cpu/ozone/ea_list.cc (renamed from cpu/ooo_cpu/ea_list.cc) | 0 | ||||
-rw-r--r-- | cpu/ozone/ea_list.hh (renamed from cpu/ooo_cpu/ea_list.hh) | 0 | ||||
-rw-r--r-- | cpu/pc_event.cc | 2 | ||||
-rw-r--r-- | cpu/simple/cpu.cc (renamed from cpu/simple_cpu/simple_cpu.cc) | 18 | ||||
-rw-r--r-- | cpu/simple/cpu.hh (renamed from cpu/simple_cpu/simple_cpu.hh) | 4 | ||||
-rw-r--r-- | cpu/smt.hh (renamed from cpu/full_cpu/smt.hh) | 0 | ||||
-rw-r--r-- | cpu/static_inst.hh | 5 | ||||
-rw-r--r-- | dev/alpha_console.cc | 6 | ||||
-rw-r--r-- | dev/baddev.cc | 2 | ||||
-rw-r--r-- | dev/ide_ctrl.cc | 5 | ||||
-rw-r--r-- | dev/ide_disk.cc | 2 | ||||
-rw-r--r-- | dev/io_device.hh | 2 | ||||
-rw-r--r-- | dev/ns_gige.cc | 5 | ||||
-rw-r--r-- | dev/pciconfigall.cc | 2 | ||||
-rw-r--r-- | dev/pcidev.cc | 3 | ||||
-rw-r--r-- | dev/simconsole.cc | 2 | ||||
-rw-r--r-- | dev/simple_disk.cc | 2 | ||||
-rw-r--r-- | dev/simple_disk.hh | 10 | ||||
-rw-r--r-- | dev/sinic.cc | 5 | ||||
-rw-r--r-- | dev/tsunami.cc | 2 | ||||
-rw-r--r-- | dev/tsunami_cchip.cc | 2 | ||||
-rw-r--r-- | dev/tsunami_io.cc | 2 | ||||
-rw-r--r-- | dev/tsunami_pchip.cc | 4 | ||||
-rw-r--r-- | dev/uart.cc | 2 | ||||
-rw-r--r-- | encumbered/cpu/full/op_class.hh (renamed from cpu/full_cpu/op_class.hh) | 6 | ||||
-rw-r--r-- | kern/linux/linux_system.cc | 6 | ||||
-rw-r--r-- | kern/system_events.cc | 6 | ||||
-rw-r--r-- | kern/tru64/tru64_events.cc | 4 | ||||
-rw-r--r-- | kern/tru64/tru64_system.cc | 6 | ||||
-rw-r--r-- | sim/eventq.cc | 2 | ||||
-rw-r--r-- | sim/main.cc | 4 | ||||
-rw-r--r-- | sim/process.cc | 6 | ||||
-rw-r--r-- | sim/stat_control.cc | 2 | ||||
-rw-r--r-- | sim/syscall_emul.cc | 2 | ||||
-rw-r--r-- | sim/syscall_emul.hh | 2 | ||||
-rw-r--r-- | sim/system.cc | 4 |
121 files changed, 310 insertions, 323 deletions
diff --git a/SConscript b/SConscript index 059ce0ca1..b7ca89305 100644 --- a/SConscript +++ b/SConscript @@ -45,7 +45,7 @@ Import('env') # Base sources used by all configurations. base_sources = Split(''' arch/alpha/decoder.cc - arch/alpha/alpha_full_cpu_exec.cc + arch/alpha/alpha_o3_exec.cc arch/alpha/fast_cpu_exec.cc arch/alpha/simple_cpu_exec.cc arch/alpha/full_cpu_exec.cc @@ -89,78 +89,80 @@ base_sources = Split(''' base/stats/visit.cc base/stats/text.cc - cpu/base_cpu.cc + cpu/base.cc cpu/base_dyn_inst.cc cpu/exec_context.cc cpu/exetrace.cc cpu/pc_event.cc cpu/static_inst.cc - cpu/beta_cpu/2bit_local_pred.cc - cpu/beta_cpu/alpha_dyn_inst.cc - cpu/beta_cpu/alpha_full_cpu.cc - cpu/beta_cpu/alpha_full_cpu_builder.cc - cpu/beta_cpu/bpred_unit.cc - cpu/beta_cpu/btb.cc - cpu/beta_cpu/commit.cc - cpu/beta_cpu/decode.cc - cpu/beta_cpu/fetch.cc - cpu/beta_cpu/free_list.cc - cpu/beta_cpu/full_cpu.cc - cpu/beta_cpu/iew.cc - cpu/beta_cpu/inst_queue.cc - cpu/beta_cpu/ldstq.cc - cpu/beta_cpu/mem_dep_unit.cc - cpu/beta_cpu/ras.cc - cpu/beta_cpu/rename.cc - cpu/beta_cpu/rename_map.cc - cpu/beta_cpu/rob.cc - cpu/beta_cpu/sat_counter.cc - cpu/beta_cpu/store_set.cc - cpu/beta_cpu/tournament_pred.cc - cpu/fast_cpu/fast_cpu.cc - cpu/full_cpu/bpred.cc - cpu/full_cpu/commit.cc - cpu/full_cpu/create_vector.cc - cpu/full_cpu/cv_spec_state.cc - cpu/full_cpu/dd_queue.cc - cpu/full_cpu/dep_link.cc - cpu/full_cpu/dispatch.cc - cpu/full_cpu/dyn_inst.cc - cpu/full_cpu/execute.cc - cpu/full_cpu/fetch.cc - cpu/full_cpu/floss_reasons.cc - cpu/full_cpu/fu_pool.cc - cpu/full_cpu/full_cpu.cc - cpu/full_cpu/inst_fifo.cc - cpu/full_cpu/instpipe.cc - cpu/full_cpu/issue.cc - cpu/full_cpu/ls_queue.cc - cpu/full_cpu/machine_queue.cc - cpu/full_cpu/pc_sample_profile.cc - cpu/full_cpu/pipetrace.cc - cpu/full_cpu/readyq.cc - cpu/full_cpu/reg_info.cc - cpu/full_cpu/rob_station.cc - cpu/full_cpu/spec_memory.cc - cpu/full_cpu/spec_state.cc - cpu/full_cpu/storebuffer.cc - cpu/full_cpu/writeback.cc - cpu/full_cpu/iq/iq_station.cc - cpu/full_cpu/iq/iqueue.cc - cpu/full_cpu/iq/segmented/chain_info.cc - cpu/full_cpu/iq/segmented/chain_wire.cc - cpu/full_cpu/iq/segmented/iq_seg.cc - cpu/full_cpu/iq/segmented/iq_segmented.cc - cpu/full_cpu/iq/segmented/seg_chain.cc - cpu/full_cpu/iq/seznec/iq_seznec.cc - cpu/full_cpu/iq/standard/iq_standard.cc - cpu/sampling_cpu/sampling_cpu.cc - cpu/simple_cpu/simple_cpu.cc + cpu/o3/2bit_local_pred.cc + cpu/o3/alpha_dyn_inst.cc + cpu/o3/alpha_cpu.cc + cpu/o3/alpha_cpu_builder.cc + cpu/o3/bpred_unit.cc + cpu/o3/btb.cc + cpu/o3/commit.cc + cpu/o3/decode.cc + cpu/o3/fetch.cc + cpu/o3/free_list.cc + cpu/o3/cpu.cc + cpu/o3/iew.cc + cpu/o3/inst_queue.cc + cpu/o3/ldstq.cc + cpu/o3/mem_dep_unit.cc + cpu/o3/ras.cc + cpu/o3/rename.cc + cpu/o3/rename_map.cc + cpu/o3/rob.cc + cpu/o3/sat_counter.cc + cpu/o3/store_set.cc + cpu/o3/tournament_pred.cc + cpu/fast/cpu.cc + cpu/sampler/sampler.cc + cpu/simple/cpu.cc cpu/trace/reader/mem_trace_reader.cc cpu/trace/reader/ibm_reader.cc cpu/trace/reader/itx_reader.cc cpu/trace/reader/m5_reader.cc + encumbered/cpu/full/bpred.cc + encumbered/cpu/full/commit.cc + encumbered/cpu/full/cpu.cc + encumbered/cpu/full/create_vector.cc + encumbered/cpu/full/cv_spec_state.cc + encumbered/cpu/full/dd_queue.cc + encumbered/cpu/full/dep_link.cc + encumbered/cpu/full/dispatch.cc + encumbered/cpu/full/dyn_inst.cc + encumbered/cpu/full/execute.cc + encumbered/cpu/full/fetch.cc + encumbered/cpu/full/floss_reasons.cc + encumbered/cpu/full/fu_pool.cc + encumbered/cpu/full/inst_fifo.cc + encumbered/cpu/full/instpipe.cc + encumbered/cpu/full/issue.cc + encumbered/cpu/full/ls_queue.cc + encumbered/cpu/full/machine_queue.cc + encumbered/cpu/full/pc_sample_profile.cc + encumbered/cpu/full/pipetrace.cc + encumbered/cpu/full/readyq.cc + encumbered/cpu/full/reg_info.cc + encumbered/cpu/full/rob_station.cc + encumbered/cpu/full/spec_memory.cc + encumbered/cpu/full/spec_state.cc + encumbered/cpu/full/storebuffer.cc + encumbered/cpu/full/writeback.cc + encumbered/cpu/full/iq/iq_station.cc + encumbered/cpu/full/iq/iqueue.cc + encumbered/cpu/full/iq/segmented/chain_info.cc + encumbered/cpu/full/iq/segmented/chain_wire.cc + encumbered/cpu/full/iq/segmented/iq_seg.cc + encumbered/cpu/full/iq/segmented/iq_segmented.cc + encumbered/cpu/full/iq/segmented/seg_chain.cc + encumbered/cpu/full/iq/seznec/iq_seznec.cc + encumbered/cpu/full/iq/standard/iq_standard.cc + encumbered/mem/functional/main.cc + mem/base_hier.cc mem/base_mem.cc mem/hier_params.cc @@ -202,11 +204,10 @@ base_sources = Split(''' mem/cache/tags/split_lru.cc mem/cache/tags/repl/gen.cc mem/cache/tags/repl/repl.cc - mem/functional_mem/functional_memory.cc - mem/functional_mem/main_memory.cc - mem/timing_mem/base_memory.cc - mem/timing_mem/memory_builder.cc - mem/timing_mem/simple_mem_bank.cc + mem/functional/functional.cc + mem/timing/base_memory.cc + mem/timing/memory_builder.cc + mem/timing/simple_mem_bank.cc mem/trace/itx_writer.cc mem/trace/mem_trace_writer.cc mem/trace/m5_writer.cc @@ -257,7 +258,6 @@ full_system_sources = Split(''' dev/baddev.cc dev/simconsole.cc dev/disk_image.cc - dev/dma.cc dev/etherbus.cc dev/etherdump.cc dev/etherint.cc @@ -268,25 +268,12 @@ full_system_sources = Split(''' dev/ide_disk.cc dev/io_device.cc dev/ns_gige.cc - dev/etherdev.cc dev/pciconfigall.cc dev/pcidev.cc dev/pktfifo.cc - dev/scsi.cc - dev/scsi_ctrl.cc - dev/scsi_disk.cc - dev/scsi_none.cc + dev/platform.cc dev/sinic.cc dev/simple_disk.cc - dev/tlaser_clock.cc - dev/tlaser_ipi.cc - dev/tlaser_mbox.cc - dev/tlaser_mc146818.cc - dev/tlaser_node.cc - dev/tlaser_pcia.cc - dev/tlaser_pcidev.cc - dev/tlaser_serial.cc - dev/turbolaser.cc dev/tsunami.cc dev/tsunami_cchip.cc dev/tsunami_fake.cc @@ -294,6 +281,22 @@ full_system_sources = Split(''' dev/tsunami_pchip.cc dev/uart.cc + encumbered/dev/dma.cc + encumbered/dev/etherdev.cc + encumbered/dev/scsi.cc + encumbered/dev/scsi_ctrl.cc + encumbered/dev/scsi_disk.cc + encumbered/dev/scsi_none.cc + encumbered/dev/tlaser_clock.cc + encumbered/dev/tlaser_ipi.cc + encumbered/dev/tlaser_mbox.cc + encumbered/dev/tlaser_mc146818.cc + encumbered/dev/tlaser_node.cc + encumbered/dev/tlaser_pcia.cc + encumbered/dev/tlaser_pcidev.cc + encumbered/dev/tlaser_serial.cc + encumbered/dev/turbolaser.cc + kern/kernel_binning.cc kern/kernel_stats.cc kern/system_events.cc @@ -307,9 +310,8 @@ full_system_sources = Split(''' kern/tru64/tru64_syscalls.cc kern/tru64/tru64_system.cc - mem/functional_mem/memory_control.cc - mem/functional_mem/physical_memory.cc - dev/platform.cc + mem/functional/memory_control.cc + mem/functional/physical.cc sim/system.cc ''') @@ -391,7 +393,7 @@ env.Command(Split('base/traceflags.hh base/traceflags.cc'), # several files are generated from arch/$TARGET_ISA/isa_desc. env.Command(Split('''arch/alpha/decoder.cc arch/alpha/decoder.hh - arch/alpha/alpha_full_cpu_exec.cc + arch/alpha/alpha_o3_exec.cc arch/alpha/fast_cpu_exec.cc arch/alpha/simple_cpu_exec.cc arch/alpha/full_cpu_exec.cc'''), diff --git a/arch/alpha/alpha_linux_process.cc b/arch/alpha/alpha_linux_process.cc index 07bd5e800..09039db90 100644 --- a/arch/alpha/alpha_linux_process.cc +++ b/arch/alpha/alpha_linux_process.cc @@ -34,9 +34,9 @@ #include <sys/types.h> #include <unistd.h> -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "sim/fake_syscall.hh" #include "sim/host.hh" #include "sim/process.hh" diff --git a/arch/alpha/alpha_tru64_process.cc b/arch/alpha/alpha_tru64_process.cc index 4d73e711f..ab8558182 100644 --- a/arch/alpha/alpha_tru64_process.cc +++ b/arch/alpha/alpha_tru64_process.cc @@ -44,9 +44,9 @@ #include "arch/alpha/alpha_common_syscall_emul.hh" #include "arch/alpha/alpha_tru64_process.hh" #include "base/trace.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "sim/fake_syscall.hh" #include "sim/host.hh" #include "sim/process.hh" diff --git a/arch/alpha/arguments.cc b/arch/alpha/arguments.cc index 905d6b9ae..392f842fe 100644 --- a/arch/alpha/arguments.cc +++ b/arch/alpha/arguments.cc @@ -29,7 +29,7 @@ #include "arch/alpha/arguments.hh" #include "arch/alpha/vtophys.hh" #include "cpu/exec_context.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/physical.hh" AlphaArguments::Data::~Data() { diff --git a/arch/alpha/ev5.cc b/arch/alpha/ev5.cc index d75f4a865..9dcc9cab1 100644 --- a/arch/alpha/ev5.cc +++ b/arch/alpha/ev5.cc @@ -6,9 +6,9 @@ #include "base/kgdb.h" #include "base/remote_gdb.hh" #include "base/stats/events.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" -#include "cpu/fast_cpu/fast_cpu.hh" +#include "cpu/fast/cpu.hh" #include "kern/kernel_stats.hh" #include "sim/debug.hh" #include "sim/sim_events.hh" diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc index 0e07400d3..02b9bfa09 100644 --- a/arch/alpha/isa_desc +++ b/arch/alpha/isa_desc @@ -41,7 +41,7 @@ output exec {{ #ifdef FULL_SYSTEM #include "arch/alpha/pseudo_inst.hh" #endif -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exetrace.hh" #include "sim/sim_exit.hh" }}; diff --git a/arch/alpha/pseudo_inst.cc b/arch/alpha/pseudo_inst.cc index a4af891af..ff34aa19d 100644 --- a/arch/alpha/pseudo_inst.cc +++ b/arch/alpha/pseudo_inst.cc @@ -35,8 +35,8 @@ #include "arch/alpha/pseudo_inst.hh" #include "arch/alpha/vtophys.hh" -#include "cpu/base_cpu.hh" -#include "cpu/sampling_cpu/sampling_cpu.hh" +#include "cpu/base.hh" +#include "cpu/sampler/sampler.hh" #include "cpu/exec_context.hh" #include "kern/kernel_stats.hh" #include "sim/param.hh" diff --git a/arch/alpha/vtophys.cc b/arch/alpha/vtophys.cc index e26721aab..b87842f49 100644 --- a/arch/alpha/vtophys.cc +++ b/arch/alpha/vtophys.cc @@ -31,7 +31,7 @@ #include "arch/alpha/vtophys.hh" #include "base/trace.hh" #include "cpu/exec_context.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/physical.hh" using namespace std; diff --git a/arch/isa_parser.py b/arch/isa_parser.py index 0d1320ccc..d5cdd348b 100755 --- a/arch/isa_parser.py +++ b/arch/isa_parser.py @@ -628,16 +628,16 @@ class CpuModel: # CPU-model-specific information in this file. Note that the ISA # description itself should have *no* CPU-model-specific content. CpuModel('SimpleCPU', 'simple_cpu_exec.cc', - '#include "cpu/simple_cpu/simple_cpu.hh"', + '#include "cpu/simple/cpu.hh"', { 'CPU_exec_context': 'SimpleCPU' }) CpuModel('FastCPU', 'fast_cpu_exec.cc', - '#include "cpu/fast_cpu/fast_cpu.hh"', + '#include "cpu/fast/cpu.hh"', { 'CPU_exec_context': 'FastCPU' }) CpuModel('FullCPU', 'full_cpu_exec.cc', - '#include "cpu/full_cpu/dyn_inst.hh"', + '#include "encumbered/cpu/full/dyn_inst.hh"', { 'CPU_exec_context': 'DynInst' }) -CpuModel('AlphaFullCPU', 'alpha_full_cpu_exec.cc', - '#include "cpu/beta_cpu/alpha_dyn_inst.hh"', +CpuModel('AlphaFullCPU', 'alpha_o3_exec.cc', + '#include "cpu/o3/alpha_dyn_inst.hh"', { 'CPU_exec_context': 'AlphaDynInst<AlphaSimpleImpl>' }) # Expand template with CPU-specific references into a dictionary with diff --git a/base/loader/aout_object.cc b/base/loader/aout_object.cc index 42a376ed1..c1e49bff6 100644 --- a/base/loader/aout_object.cc +++ b/base/loader/aout_object.cc @@ -30,7 +30,7 @@ #include "base/loader/aout_object.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "base/loader/symtab.hh" #include "base/trace.hh" // for DPRINTF diff --git a/base/loader/ecoff_object.cc b/base/loader/ecoff_object.cc index 714f1d7b8..bc80ffb96 100644 --- a/base/loader/ecoff_object.cc +++ b/base/loader/ecoff_object.cc @@ -30,7 +30,7 @@ #include "base/loader/ecoff_object.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "base/loader/symtab.hh" #include "base/trace.hh" // for DPRINTF diff --git a/base/loader/elf_object.cc b/base/loader/elf_object.cc index d434d199d..cec18d2f7 100644 --- a/base/loader/elf_object.cc +++ b/base/loader/elf_object.cc @@ -43,7 +43,7 @@ #include "base/loader/elf_object.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "base/loader/symtab.hh" #include "base/trace.hh" // for DPRINTF diff --git a/base/remote_gdb.cc b/base/remote_gdb.cc index 484a01944..c3590920a 100644 --- a/base/remote_gdb.cc +++ b/base/remote_gdb.cc @@ -116,22 +116,20 @@ #include <sys/signal.h> -#include <unistd.h> - #include <cstdio> #include <string> +#include <unistd.h> -#include "cpu/exec_context.hh" #include "base/intmath.hh" #include "base/kgdb.h" - -#include "mem/functional_mem/physical_memory.hh" #include "base/remote_gdb.hh" #include "base/socket.hh" #include "base/trace.hh" -#include "targetarch/vtophys.hh" -#include "sim/system.hh" +#include "cpu/exec_context.hh" #include "cpu/static_inst.hh" +#include "mem/functional/physical.hh" +#include "sim/system.hh" +#include "targetarch/vtophys.hh" using namespace std; diff --git a/cpu/base_cpu.cc b/cpu/base.cc index fd91749f7..91ddc165e 100644 --- a/cpu/base_cpu.cc +++ b/cpu/base.cc @@ -34,9 +34,9 @@ #include "base/loader/symtab.hh" #include "base/misc.hh" #include "base/output.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" -#include "cpu/sampling_cpu/sampling_cpu.hh" +#include "cpu/sampler/sampler.hh" #include "sim/param.hh" #include "sim/sim_events.hh" diff --git a/cpu/base_cpu.hh b/cpu/base.hh index f38a6c939..0cb81e93b 100644 --- a/cpu/base_cpu.hh +++ b/cpu/base.hh @@ -26,13 +26,13 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __BASE_CPU_HH__ -#define __BASE_CPU_HH__ +#ifndef __CPU_BASE_HH__ +#define __CPU_BASE_HH__ #include <vector> #include "base/statistics.hh" -#include "cpu/sampling_cpu/sampling_cpu.hh" +#include "cpu/sampler/sampler.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" #include "targetarch/isa_traits.hh" @@ -216,4 +216,4 @@ class BaseCPU : public SimObject Stats::Scalar<> numCycles; }; -#endif // __BASE_CPU_HH__ +#endif // __CPU_BASE_HH__ diff --git a/cpu/base_dyn_inst.cc b/cpu/base_dyn_inst.cc index 98a4d5b6d..5ad990c72 100644 --- a/cpu/base_dyn_inst.cc +++ b/cpu/base_dyn_inst.cc @@ -41,8 +41,8 @@ #include "mem/mem_req.hh" #include "cpu/base_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/alpha_full_cpu.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/alpha_cpu.hh" using namespace std; diff --git a/cpu/base_dyn_inst.hh b/cpu/base_dyn_inst.hh index a54e53255..2a5e07894 100644 --- a/cpu/base_dyn_inst.hh +++ b/cpu/base_dyn_inst.hh @@ -34,16 +34,15 @@ #include "base/fast_alloc.hh" #include "base/trace.hh" - -#include "cpu/beta_cpu/comm.hh" #include "cpu/exetrace.hh" -#include "cpu/full_cpu/bpred_update.hh" -#include "cpu/full_cpu/op_class.hh" -#include "cpu/full_cpu/spec_memory.hh" -#include "cpu/full_cpu/spec_state.hh" #include "cpu/inst_seq.hh" +#include "cpu/o3/comm.hh" #include "cpu/static_inst.hh" -#include "mem/functional_mem/main_memory.hh" +#include "encumbered/cpu/full/bpred_update.hh" +#include "encumbered/cpu/full/op_class.hh" +#include "encumbered/cpu/full/spec_memory.hh" +#include "encumbered/cpu/full/spec_state.hh" +#include "encumbered/mem/functional/main.hh" /** * @file diff --git a/cpu/beta_cpu/rob.cc b/cpu/beta_cpu/rob.cc deleted file mode 100644 index ad45c022f..000000000 --- a/cpu/beta_cpu/rob.cc +++ /dev/null @@ -1,7 +0,0 @@ - -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/rob_impl.hh" - -// Force instantiation of InstructionQueue. -template class ROB<AlphaSimpleImpl>; diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index 1cb33f13e..87b064dbc 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -28,7 +28,7 @@ #include <string> -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #ifdef FULL_SYSTEM diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index d6140d52f..3e55cb5c6 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -26,12 +26,12 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __EXEC_CONTEXT_HH__ -#define __EXEC_CONTEXT_HH__ +#ifndef __CPU_EXEC_CONTEXT_HH__ +#define __CPU_EXEC_CONTEXT_HH__ -#include "sim/host.hh" +#include "mem/functional/functional.hh" #include "mem/mem_req.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "sim/host.hh" #include "sim/serialize.hh" #include "targetarch/byte_swap.hh" @@ -467,4 +467,4 @@ ExecContext::misspeculating() return false; } -#endif // __EXEC_CONTEXT_HH__ +#endif // __CPU_EXEC_CONTEXT_HH__ diff --git a/cpu/exetrace.cc b/cpu/exetrace.cc index 048a7d283..953e1ff06 100644 --- a/cpu/exetrace.cc +++ b/cpu/exetrace.cc @@ -30,13 +30,13 @@ #include <iomanip> #include "sim/param.hh" -#include "cpu/full_cpu/dyn_inst.hh" -#include "cpu/full_cpu/spec_state.hh" -#include "cpu/full_cpu/issue.hh" +#include "encumbered/cpu/full/dyn_inst.hh" +#include "encumbered/cpu/full/spec_state.hh" +#include "encumbered/cpu/full/issue.hh" #include "cpu/exetrace.hh" #include "cpu/exec_context.hh" #include "base/loader/symtab.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/static_inst.hh" using namespace std; diff --git a/cpu/intr_control.cc b/cpu/intr_control.cc index 53de9d288..fac0926bf 100644 --- a/cpu/intr_control.cc +++ b/cpu/intr_control.cc @@ -29,7 +29,7 @@ #include <string> #include <vector> -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/intr_control.hh" #include "sim/builder.hh" #include "sim/sim_object.hh" diff --git a/cpu/intr_control.hh b/cpu/intr_control.hh index 8cdc6b61b..6a43cd933 100644 --- a/cpu/intr_control.hh +++ b/cpu/intr_control.hh @@ -31,7 +31,7 @@ #include <vector> #include "base/misc.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "sim/sim_object.hh" #include "sim/system.hh" #include "cpu/exec_context.hh" diff --git a/cpu/memtest/memtest.cc b/cpu/memtest/memtest.cc index 86d03e162..728e29ff1 100644 --- a/cpu/memtest/memtest.cc +++ b/cpu/memtest/memtest.cc @@ -39,7 +39,6 @@ #include "cpu/exec_context.hh" #include "cpu/memtest/memtest.hh" #include "mem/cache/base_cache.hh" -#include "mem/functional_mem/main_memory.hh" #include "sim/builder.hh" #include "sim/sim_events.hh" #include "sim/stats.hh" diff --git a/cpu/memtest/memtest.hh b/cpu/memtest/memtest.hh index ed25cf374..feb50ad9b 100644 --- a/cpu/memtest/memtest.hh +++ b/cpu/memtest/memtest.hh @@ -32,7 +32,7 @@ #include <set> #include "base/statistics.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "mem/mem_interface.hh" #include "sim/eventq.hh" #include "sim/sim_exit.hh" diff --git a/cpu/beta_cpu/2bit_local_pred.cc b/cpu/o3/2bit_local_pred.cc index e753cbcf3..d9744eec7 100644 --- a/cpu/beta_cpu/2bit_local_pred.cc +++ b/cpu/o3/2bit_local_pred.cc @@ -27,7 +27,7 @@ */ #include "base/trace.hh" -#include "cpu/beta_cpu/2bit_local_pred.hh" +#include "cpu/o3/2bit_local_pred.hh" DefaultBP::DefaultBP(unsigned _localPredictorSize, unsigned _localCtrBits, diff --git a/cpu/beta_cpu/2bit_local_pred.hh b/cpu/o3/2bit_local_pred.hh index 945584e04..856407f56 100644 --- a/cpu/beta_cpu/2bit_local_pred.hh +++ b/cpu/o3/2bit_local_pred.hh @@ -31,7 +31,7 @@ // For Addr type. #include "arch/alpha/isa_traits.hh" -#include "cpu/beta_cpu/sat_counter.hh" +#include "cpu/o3/sat_counter.hh" class DefaultBP { diff --git a/cpu/beta_cpu/alpha_full_cpu.cc b/cpu/o3/alpha_cpu.cc index 862a8cc3f..7bc90dae6 100644 --- a/cpu/beta_cpu/alpha_full_cpu.cc +++ b/cpu/o3/alpha_cpu.cc @@ -26,9 +26,9 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/alpha_full_cpu_impl.hh" -#include "cpu/beta_cpu/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/alpha_cpu_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" // Force instantiation of AlphaFullCPU for all the implemntations that are // needed. Consider merging this and alpha_dyn_inst.cc, and maybe all diff --git a/cpu/beta_cpu/alpha_full_cpu.hh b/cpu/o3/alpha_cpu.hh index 4213979d5..386c60b0c 100644 --- a/cpu/beta_cpu/alpha_full_cpu.hh +++ b/cpu/o3/alpha_cpu.hh @@ -32,7 +32,7 @@ #ifndef __CPU_BETA_CPU_ALPHA_FULL_CPU_HH__ #define __CPU_BETA_CPU_ALPHA_FULL_CPU_HH__ -#include "cpu/beta_cpu/full_cpu.hh" +#include "cpu/o3/cpu.hh" template <class Impl> class AlphaFullCPU : public FullBetaCPU<Impl> diff --git a/cpu/beta_cpu/alpha_full_cpu_builder.cc b/cpu/o3/alpha_cpu_builder.cc index f56c9f6c3..6f4e4f0be 100644 --- a/cpu/beta_cpu/alpha_full_cpu_builder.cc +++ b/cpu/o3/alpha_cpu_builder.cc @@ -26,18 +26,16 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/alpha_full_cpu.hh" - -#include "mem/cache/base_cache.hh" - #include "base/inifile.hh" #include "base/loader/symtab.hh" #include "base/misc.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #include "cpu/exetrace.hh" +#include "cpu/o3/alpha_cpu.hh" +#include "cpu/o3/alpha_impl.hh" #include "mem/base_mem.hh" +#include "mem/cache/base_cache.hh" #include "mem/mem_interface.hh" #include "sim/builder.hh" #include "sim/debug.hh" @@ -49,16 +47,14 @@ #ifdef FULL_SYSTEM #include "base/remote_gdb.hh" -#include "dev/alpha_access.h" -#include "dev/pciareg.h" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/system.hh" #include "targetarch/alpha_memory.hh" #include "targetarch/vtophys.hh" #else // !FULL_SYSTEM #include "eio/eio.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #endif // FULL_SYSTEM class DerivAlphaFullCPU : public AlphaFullCPU<AlphaSimpleImpl> diff --git a/cpu/beta_cpu/alpha_full_cpu_impl.hh b/cpu/o3/alpha_cpu_impl.hh index 8132ec859..822d58f1f 100644 --- a/cpu/beta_cpu/alpha_full_cpu_impl.hh +++ b/cpu/o3/alpha_cpu_impl.hh @@ -8,9 +8,9 @@ #include "sim/sim_events.hh" #include "sim/stats.hh" -#include "cpu/beta_cpu/alpha_full_cpu.hh" -#include "cpu/beta_cpu/alpha_params.hh" -#include "cpu/beta_cpu/comm.hh" +#include "cpu/o3/alpha_cpu.hh" +#include "cpu/o3/alpha_params.hh" +#include "cpu/o3/comm.hh" #ifdef FULL_SYSTEM #include "arch/alpha/osfpal.hh" diff --git a/cpu/beta_cpu/alpha_dyn_inst.cc b/cpu/o3/alpha_dyn_inst.cc index 39759dd88..72ac77d95 100644 --- a/cpu/beta_cpu/alpha_dyn_inst.cc +++ b/cpu/o3/alpha_dyn_inst.cc @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst_impl.hh" -#include "cpu/beta_cpu/alpha_impl.hh" +#include "cpu/o3/alpha_dyn_inst_impl.hh" +#include "cpu/o3/alpha_impl.hh" // Force instantiation of AlphaDynInst for all the implementations that // are needed. diff --git a/cpu/beta_cpu/alpha_dyn_inst.hh b/cpu/o3/alpha_dyn_inst.hh index e4a790119..0b6b62f35 100644 --- a/cpu/beta_cpu/alpha_dyn_inst.hh +++ b/cpu/o3/alpha_dyn_inst.hh @@ -30,8 +30,8 @@ #define __CPU_BETA_CPU_ALPHA_DYN_INST_HH__ #include "cpu/base_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_full_cpu.hh" -#include "cpu/beta_cpu/alpha_impl.hh" +#include "cpu/o3/alpha_cpu.hh" +#include "cpu/o3/alpha_impl.hh" #include "cpu/inst_seq.hh" /** diff --git a/cpu/beta_cpu/alpha_dyn_inst_impl.hh b/cpu/o3/alpha_dyn_inst_impl.hh index 66a2cc316..437b113e4 100644 --- a/cpu/beta_cpu/alpha_dyn_inst_impl.hh +++ b/cpu/o3/alpha_dyn_inst_impl.hh @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_dyn_inst.hh" template <class Impl> AlphaDynInst<Impl>::AlphaDynInst(MachInst inst, Addr PC, Addr Pred_PC, diff --git a/cpu/beta_cpu/alpha_impl.hh b/cpu/o3/alpha_impl.hh index 173f3b8f7..eb3c07dd3 100644 --- a/cpu/beta_cpu/alpha_impl.hh +++ b/cpu/o3/alpha_impl.hh @@ -31,8 +31,8 @@ #include "arch/alpha/isa_traits.hh" -#include "cpu/beta_cpu/alpha_params.hh" -#include "cpu/beta_cpu/cpu_policy.hh" +#include "cpu/o3/alpha_params.hh" +#include "cpu/o3/cpu_policy.hh" // Forward declarations. template <class Impl> diff --git a/cpu/beta_cpu/alpha_params.hh b/cpu/o3/alpha_params.hh index c0379a4d9..5c8f61f3b 100644 --- a/cpu/beta_cpu/alpha_params.hh +++ b/cpu/o3/alpha_params.hh @@ -29,7 +29,7 @@ #ifndef __CPU_BETA_CPU_ALPHA_SIMPLE_PARAMS_HH__ #define __CPU_BETA_CPU_ALPHA_SIMPLE_PARAMS_HH__ -#include "cpu/beta_cpu/full_cpu.hh" +#include "cpu/o3/cpu.hh" //Forward declarations class System; diff --git a/cpu/beta_cpu/bpred_unit.cc b/cpu/o3/bpred_unit.cc index edf2df65a..85bd6f0a6 100644 --- a/cpu/beta_cpu/bpred_unit.cc +++ b/cpu/o3/bpred_unit.cc @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/bpred_unit_impl.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/alpha_dyn_inst.hh" +#include "cpu/o3/bpred_unit_impl.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" template class TwobitBPredUnit<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/bpred_unit.hh b/cpu/o3/bpred_unit.hh index 960ed500c..0a77b83dc 100644 --- a/cpu/beta_cpu/bpred_unit.hh +++ b/cpu/o3/bpred_unit.hh @@ -34,10 +34,10 @@ #include "base/statistics.hh" #include "cpu/inst_seq.hh" -#include "cpu/beta_cpu/2bit_local_pred.hh" -#include "cpu/beta_cpu/tournament_pred.hh" -#include "cpu/beta_cpu/btb.hh" -#include "cpu/beta_cpu/ras.hh" +#include "cpu/o3/2bit_local_pred.hh" +#include "cpu/o3/tournament_pred.hh" +#include "cpu/o3/btb.hh" +#include "cpu/o3/ras.hh" #include <list> diff --git a/cpu/beta_cpu/bpred_unit_impl.hh b/cpu/o3/bpred_unit_impl.hh index d88c0b391..9cb2e0490 100644 --- a/cpu/beta_cpu/bpred_unit_impl.hh +++ b/cpu/o3/bpred_unit_impl.hh @@ -28,7 +28,7 @@ #include "base/trace.hh" #include "base/traceflags.hh" -#include "cpu/beta_cpu/bpred_unit.hh" +#include "cpu/o3/bpred_unit.hh" template<class Impl> TwobitBPredUnit<Impl>::TwobitBPredUnit(Params ¶ms) diff --git a/cpu/beta_cpu/btb.cc b/cpu/o3/btb.cc index 92864dbaa..c2bca34ae 100644 --- a/cpu/beta_cpu/btb.cc +++ b/cpu/o3/btb.cc @@ -28,7 +28,7 @@ #include "base/intmath.hh" #include "base/trace.hh" -#include "cpu/beta_cpu/btb.hh" +#include "cpu/o3/btb.hh" DefaultBTB::DefaultBTB(unsigned _numEntries, unsigned _tagBits, diff --git a/cpu/beta_cpu/btb.hh b/cpu/o3/btb.hh index 66ae931e4..66ae931e4 100644 --- a/cpu/beta_cpu/btb.hh +++ b/cpu/o3/btb.hh diff --git a/cpu/beta_cpu/comm.hh b/cpu/o3/comm.hh index 475ab8df8..475ab8df8 100644 --- a/cpu/beta_cpu/comm.hh +++ b/cpu/o3/comm.hh diff --git a/cpu/beta_cpu/commit.cc b/cpu/o3/commit.cc index 3912be07a..cf33d7f8b 100644 --- a/cpu/beta_cpu/commit.cc +++ b/cpu/o3/commit.cc @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/commit_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/commit_impl.hh" template class SimpleCommit<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/commit.hh b/cpu/o3/commit.hh index 60afe1fd4..60afe1fd4 100644 --- a/cpu/beta_cpu/commit.hh +++ b/cpu/o3/commit.hh diff --git a/cpu/beta_cpu/commit_impl.hh b/cpu/o3/commit_impl.hh index 22ec22c70..ac3d83174 100644 --- a/cpu/beta_cpu/commit_impl.hh +++ b/cpu/o3/commit_impl.hh @@ -27,7 +27,7 @@ */ #include "base/timebuf.hh" -#include "cpu/beta_cpu/commit.hh" +#include "cpu/o3/commit.hh" #include "cpu/exetrace.hh" template <class Impl> diff --git a/cpu/beta_cpu/full_cpu.cc b/cpu/o3/cpu.cc index 8eedc3769..a91c36679 100644 --- a/cpu/beta_cpu/full_cpu.cc +++ b/cpu/o3/cpu.cc @@ -33,9 +33,9 @@ #endif #include "sim/root.hh" -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/full_cpu.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/cpu.hh" #include "cpu/exec_context.hh" using namespace std; diff --git a/cpu/beta_cpu/full_cpu.hh b/cpu/o3/cpu.hh index 4ca8ae9ff..df86308a8 100644 --- a/cpu/beta_cpu/full_cpu.hh +++ b/cpu/o3/cpu.hh @@ -42,9 +42,9 @@ #include "base/statistics.hh" #include "base/timebuf.hh" -#include "cpu/base_cpu.hh" -#include "cpu/beta_cpu/comm.hh" -#include "cpu/beta_cpu/cpu_policy.hh" +#include "cpu/base.hh" +#include "cpu/o3/comm.hh" +#include "cpu/o3/cpu_policy.hh" #include "cpu/exec_context.hh" #include "sim/process.hh" diff --git a/cpu/beta_cpu/cpu_policy.hh b/cpu/o3/cpu_policy.hh index 88e6dca5f..2b53b436d 100644 --- a/cpu/beta_cpu/cpu_policy.hh +++ b/cpu/o3/cpu_policy.hh @@ -29,23 +29,23 @@ #ifndef __CPU_BETA_CPU_CPU_POLICY_HH__ #define __CPU_BETA_CPU_CPU_POLICY_HH__ -#include "cpu/beta_cpu/bpred_unit.hh" -#include "cpu/beta_cpu/free_list.hh" -#include "cpu/beta_cpu/inst_queue.hh" -#include "cpu/beta_cpu/ldstq.hh" -#include "cpu/beta_cpu/mem_dep_unit.hh" -#include "cpu/beta_cpu/regfile.hh" -#include "cpu/beta_cpu/rename_map.hh" -#include "cpu/beta_cpu/rob.hh" -#include "cpu/beta_cpu/store_set.hh" +#include "cpu/o3/bpred_unit.hh" +#include "cpu/o3/free_list.hh" +#include "cpu/o3/inst_queue.hh" +#include "cpu/o3/ldstq.hh" +#include "cpu/o3/mem_dep_unit.hh" +#include "cpu/o3/regfile.hh" +#include "cpu/o3/rename_map.hh" +#include "cpu/o3/rob.hh" +#include "cpu/o3/store_set.hh" -#include "cpu/beta_cpu/commit.hh" -#include "cpu/beta_cpu/decode.hh" -#include "cpu/beta_cpu/fetch.hh" -#include "cpu/beta_cpu/iew.hh" -#include "cpu/beta_cpu/rename.hh" +#include "cpu/o3/commit.hh" +#include "cpu/o3/decode.hh" +#include "cpu/o3/fetch.hh" +#include "cpu/o3/iew.hh" +#include "cpu/o3/rename.hh" -#include "cpu/beta_cpu/comm.hh" +#include "cpu/o3/comm.hh" template<class Impl> struct SimpleCPUPolicy diff --git a/cpu/beta_cpu/decode.cc b/cpu/o3/decode.cc index 7e57cd833..290648318 100644 --- a/cpu/beta_cpu/decode.cc +++ b/cpu/o3/decode.cc @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/decode_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/decode_impl.hh" template class SimpleDecode<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/decode.hh b/cpu/o3/decode.hh index 7b89bf288..7b89bf288 100644 --- a/cpu/beta_cpu/decode.hh +++ b/cpu/o3/decode.hh diff --git a/cpu/beta_cpu/decode_impl.hh b/cpu/o3/decode_impl.hh index af848341d..463f0ddac 100644 --- a/cpu/beta_cpu/decode_impl.hh +++ b/cpu/o3/decode_impl.hh @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/decode.hh" +#include "cpu/o3/decode.hh" template<class Impl> SimpleDecode<Impl>::SimpleDecode(Params ¶ms) diff --git a/cpu/beta_cpu/fetch.cc b/cpu/o3/fetch.cc index 595ab9f8e..8ad5e6565 100644 --- a/cpu/beta_cpu/fetch.cc +++ b/cpu/o3/fetch.cc @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/fetch_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/fetch_impl.hh" template class SimpleFetch<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/fetch.hh b/cpu/o3/fetch.hh index ad0453ed5..ad0453ed5 100644 --- a/cpu/beta_cpu/fetch.hh +++ b/cpu/o3/fetch.hh diff --git a/cpu/beta_cpu/fetch_impl.hh b/cpu/o3/fetch_impl.hh index b49064565..83d7a02e5 100644 --- a/cpu/beta_cpu/fetch_impl.hh +++ b/cpu/o3/fetch_impl.hh @@ -35,7 +35,7 @@ #include "mem/base_mem.hh" #include "mem/mem_interface.hh" #include "mem/mem_req.hh" -#include "cpu/beta_cpu/fetch.hh" +#include "cpu/o3/fetch.hh" #include "sim/root.hh" diff --git a/cpu/beta_cpu/free_list.cc b/cpu/o3/free_list.cc index a670e4af2..6f0b4be1e 100644 --- a/cpu/beta_cpu/free_list.cc +++ b/cpu/o3/free_list.cc @@ -28,7 +28,7 @@ #include "base/trace.hh" -#include "cpu/beta_cpu/free_list.hh" +#include "cpu/o3/free_list.hh" SimpleFreeList::SimpleFreeList(unsigned _numLogicalIntRegs, unsigned _numPhysicalIntRegs, diff --git a/cpu/beta_cpu/free_list.hh b/cpu/o3/free_list.hh index e148acaf2..09d7557a3 100644 --- a/cpu/beta_cpu/free_list.hh +++ b/cpu/o3/free_list.hh @@ -35,7 +35,7 @@ #include "arch/alpha/isa_traits.hh" #include "base/trace.hh" #include "base/traceflags.hh" -#include "cpu/beta_cpu/comm.hh" +#include "cpu/o3/comm.hh" /** * FreeList class that simply holds the list of free integer and floating diff --git a/cpu/beta_cpu/iew.cc b/cpu/o3/iew.cc index 42436ff20..45b5610e7 100644 --- a/cpu/beta_cpu/iew.cc +++ b/cpu/o3/iew.cc @@ -26,9 +26,9 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/iew_impl.hh" -#include "cpu/beta_cpu/inst_queue.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/iew_impl.hh" +#include "cpu/o3/inst_queue.hh" template class SimpleIEW<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/iew.hh b/cpu/o3/iew.hh index 3e5fbe78c..10979801c 100644 --- a/cpu/beta_cpu/iew.hh +++ b/cpu/o3/iew.hh @@ -37,7 +37,7 @@ #include "base/statistics.hh" #include "base/timebuf.hh" -#include "cpu/beta_cpu/comm.hh" +#include "cpu/o3/comm.hh" template<class Impl> class SimpleIEW diff --git a/cpu/beta_cpu/iew_impl.hh b/cpu/o3/iew_impl.hh index 39c854833..5f0d7b647 100644 --- a/cpu/beta_cpu/iew_impl.hh +++ b/cpu/o3/iew_impl.hh @@ -34,7 +34,7 @@ #include <queue> #include "base/timebuf.hh" -#include "cpu/beta_cpu/iew.hh" +#include "cpu/o3/iew.hh" template<class Impl> SimpleIEW<Impl>::WritebackEvent::WritebackEvent(DynInstPtr &_inst, diff --git a/cpu/beta_cpu/inst_queue.cc b/cpu/o3/inst_queue.cc index 2362fe252..2ff2282b4 100644 --- a/cpu/beta_cpu/inst_queue.cc +++ b/cpu/o3/inst_queue.cc @@ -26,9 +26,9 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/inst_queue_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/inst_queue_impl.hh" // Force instantiation of InstructionQueue. template class InstructionQueue<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/inst_queue.hh b/cpu/o3/inst_queue.hh index 02dc1222d..02dc1222d 100644 --- a/cpu/beta_cpu/inst_queue.hh +++ b/cpu/o3/inst_queue.hh diff --git a/cpu/beta_cpu/inst_queue_impl.hh b/cpu/o3/inst_queue_impl.hh index 51504347a..2221ba456 100644 --- a/cpu/beta_cpu/inst_queue_impl.hh +++ b/cpu/o3/inst_queue_impl.hh @@ -38,7 +38,7 @@ #include "sim/root.hh" -#include "cpu/beta_cpu/inst_queue.hh" +#include "cpu/o3/inst_queue.hh" // Either compile error or max int due to sign extension. // Hack to avoid compile warnings. diff --git a/cpu/beta_cpu/mem_dep_unit.cc b/cpu/o3/mem_dep_unit.cc index 9f8831c35..9c1e7f9d8 100644 --- a/cpu/beta_cpu/mem_dep_unit.cc +++ b/cpu/o3/mem_dep_unit.cc @@ -26,10 +26,10 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/store_set.hh" -#include "cpu/beta_cpu/mem_dep_unit_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/store_set.hh" +#include "cpu/o3/mem_dep_unit_impl.hh" // Force instantation of memory dependency unit using store sets and // AlphaSimpleImpl. diff --git a/cpu/beta_cpu/mem_dep_unit.hh b/cpu/o3/mem_dep_unit.hh index f2bb8923a..f2bb8923a 100644 --- a/cpu/beta_cpu/mem_dep_unit.hh +++ b/cpu/o3/mem_dep_unit.hh diff --git a/cpu/beta_cpu/mem_dep_unit_impl.hh b/cpu/o3/mem_dep_unit_impl.hh index e8cd88ba7..296db4c4e 100644 --- a/cpu/beta_cpu/mem_dep_unit_impl.hh +++ b/cpu/o3/mem_dep_unit_impl.hh @@ -28,7 +28,7 @@ #include <map> -#include "cpu/beta_cpu/mem_dep_unit.hh" +#include "cpu/o3/mem_dep_unit.hh" template <class MemDepPred, class Impl> MemDepUnit<MemDepPred, Impl>::MemDepUnit(Params ¶ms) diff --git a/cpu/beta_cpu/ras.cc b/cpu/o3/ras.cc index 6b7bf8a09..0a7d6ca63 100644 --- a/cpu/beta_cpu/ras.cc +++ b/cpu/o3/ras.cc @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/ras.hh" +#include "cpu/o3/ras.hh" ReturnAddrStack::ReturnAddrStack(unsigned _numEntries) : numEntries(_numEntries), usedEntries(0), diff --git a/cpu/beta_cpu/ras.hh b/cpu/o3/ras.hh index d0891a7fb..d0891a7fb 100644 --- a/cpu/beta_cpu/ras.hh +++ b/cpu/o3/ras.hh diff --git a/cpu/beta_cpu/regfile.hh b/cpu/o3/regfile.hh index a41f68e8c..e07944e67 100644 --- a/cpu/beta_cpu/regfile.hh +++ b/cpu/o3/regfile.hh @@ -33,7 +33,7 @@ #include "arch/alpha/isa_traits.hh" #include "base/trace.hh" -#include "cpu/beta_cpu/comm.hh" +#include "cpu/o3/comm.hh" #ifdef FULL_SYSTEM #include "arch/alpha/ev5.hh" diff --git a/cpu/beta_cpu/rename.cc b/cpu/o3/rename.cc index 7f1ba73b6..6e9ee23da 100644 --- a/cpu/beta_cpu/rename.cc +++ b/cpu/o3/rename.cc @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/alpha_dyn_inst.hh" -#include "cpu/beta_cpu/alpha_impl.hh" -#include "cpu/beta_cpu/rename_impl.hh" +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/rename_impl.hh" template class SimpleRename<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/rename.hh b/cpu/o3/rename.hh index 163177d87..163177d87 100644 --- a/cpu/beta_cpu/rename.hh +++ b/cpu/o3/rename.hh diff --git a/cpu/beta_cpu/rename_impl.hh b/cpu/o3/rename_impl.hh index a57f92c78..5fd62e911 100644 --- a/cpu/beta_cpu/rename_impl.hh +++ b/cpu/o3/rename_impl.hh @@ -28,7 +28,7 @@ #include <list> -#include "cpu/beta_cpu/rename.hh" +#include "cpu/o3/rename.hh" template <class Impl> SimpleRename<Impl>::SimpleRename(Params ¶ms) diff --git a/cpu/beta_cpu/rename_map.cc b/cpu/o3/rename_map.cc index a8ca88da9..10963f7de 100644 --- a/cpu/beta_cpu/rename_map.cc +++ b/cpu/o3/rename_map.cc @@ -28,7 +28,7 @@ #include <vector> -#include "cpu/beta_cpu/rename_map.hh" +#include "cpu/o3/rename_map.hh" using namespace std; diff --git a/cpu/beta_cpu/rename_map.hh b/cpu/o3/rename_map.hh index 46087bae0..48bb3db19 100644 --- a/cpu/beta_cpu/rename_map.hh +++ b/cpu/o3/rename_map.hh @@ -37,7 +37,7 @@ #include <utility> #include <vector> -#include "cpu/beta_cpu/free_list.hh" +#include "cpu/o3/free_list.hh" class SimpleRenameMap { diff --git a/cpu/o3/rob.cc b/cpu/o3/rob.cc new file mode 100644 index 000000000..7b590a6fe --- /dev/null +++ b/cpu/o3/rob.cc @@ -0,0 +1,7 @@ + +#include "cpu/o3/alpha_dyn_inst.hh" +#include "cpu/o3/alpha_impl.hh" +#include "cpu/o3/rob_impl.hh" + +// Force instantiation of InstructionQueue. +template class ROB<AlphaSimpleImpl>; diff --git a/cpu/beta_cpu/rob.hh b/cpu/o3/rob.hh index b283e33ca..b283e33ca 100644 --- a/cpu/beta_cpu/rob.hh +++ b/cpu/o3/rob.hh diff --git a/cpu/beta_cpu/rob_impl.hh b/cpu/o3/rob_impl.hh index dd3ffe7e6..6dea46dfc 100644 --- a/cpu/beta_cpu/rob_impl.hh +++ b/cpu/o3/rob_impl.hh @@ -29,7 +29,7 @@ #ifndef __CPU_BETA_CPU_ROB_IMPL_HH__ #define __CPU_BETA_CPU_ROB_IMPL_HH__ -#include "cpu/beta_cpu/rob.hh" +#include "cpu/o3/rob.hh" template <class Impl> ROB<Impl>::ROB(unsigned _numEntries, unsigned _squashWidth) diff --git a/cpu/beta_cpu/sat_counter.cc b/cpu/o3/sat_counter.cc index 826234703..22fe77e3c 100644 --- a/cpu/beta_cpu/sat_counter.cc +++ b/cpu/o3/sat_counter.cc @@ -27,7 +27,7 @@ */ #include "base/misc.hh" -#include "cpu/beta_cpu/sat_counter.hh" +#include "cpu/o3/sat_counter.hh" SatCounter::SatCounter() : maxVal(0), counter(0) diff --git a/cpu/beta_cpu/sat_counter.hh b/cpu/o3/sat_counter.hh index 5455ca56a..5455ca56a 100644 --- a/cpu/beta_cpu/sat_counter.hh +++ b/cpu/o3/sat_counter.hh diff --git a/cpu/beta_cpu/store_set.cc b/cpu/o3/store_set.cc index 8b9a20c02..11023f4a8 100644 --- a/cpu/beta_cpu/store_set.cc +++ b/cpu/o3/store_set.cc @@ -27,7 +27,7 @@ */ #include "base/trace.hh" -#include "cpu/beta_cpu/store_set.hh" +#include "cpu/o3/store_set.hh" StoreSet::StoreSet(int _SSIT_size, int _LFST_size) : SSIT_size(_SSIT_size), LFST_size(_LFST_size) diff --git a/cpu/beta_cpu/store_set.hh b/cpu/o3/store_set.hh index 98a92791a..98a92791a 100644 --- a/cpu/beta_cpu/store_set.hh +++ b/cpu/o3/store_set.hh diff --git a/cpu/beta_cpu/tournament_pred.cc b/cpu/o3/tournament_pred.cc index 1b85aee51..3fb580510 100644 --- a/cpu/beta_cpu/tournament_pred.cc +++ b/cpu/o3/tournament_pred.cc @@ -26,7 +26,7 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#include "cpu/beta_cpu/tournament_pred.hh" +#include "cpu/o3/tournament_pred.hh" TournamentBP::TournamentBP(unsigned _local_predictor_size, unsigned _local_ctr_bits, diff --git a/cpu/beta_cpu/tournament_pred.hh b/cpu/o3/tournament_pred.hh index d9a14e5c8..feaede369 100644 --- a/cpu/beta_cpu/tournament_pred.hh +++ b/cpu/o3/tournament_pred.hh @@ -31,7 +31,7 @@ // For Addr type. #include "arch/alpha/isa_traits.hh" -#include "cpu/beta_cpu/sat_counter.hh" +#include "cpu/o3/sat_counter.hh" class TournamentBP { diff --git a/cpu/ooo_cpu/ooo_cpu.cc b/cpu/ozone/cpu.cc index 255070de4..255070de4 100644 --- a/cpu/ooo_cpu/ooo_cpu.cc +++ b/cpu/ozone/cpu.cc diff --git a/cpu/ooo_cpu/ooo_cpu.hh b/cpu/ozone/cpu.hh index ddbc3b061..058279af1 100644 --- a/cpu/ooo_cpu/ooo_cpu.hh +++ b/cpu/ozone/cpu.hh @@ -30,9 +30,9 @@ #define __CPU_OOO_CPU_OOO_CPU_HH__ #include "base/statistics.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" -#include "cpu/full_cpu/fu_pool.hh" +#include "encumbered/cpu/full/fu_pool.hh" #include "cpu/ooo_cpu/ea_list.hh" #include "cpu/pc_event.hh" #include "cpu/static_inst.hh" diff --git a/cpu/ooo_cpu/ooo_impl.hh b/cpu/ozone/cpu_impl.hh index 9e6df9214..9e6df9214 100644 --- a/cpu/ooo_cpu/ooo_impl.hh +++ b/cpu/ozone/cpu_impl.hh diff --git a/cpu/ooo_cpu/ea_list.cc b/cpu/ozone/ea_list.cc index 4142e7f5e..4142e7f5e 100644 --- a/cpu/ooo_cpu/ea_list.cc +++ b/cpu/ozone/ea_list.cc diff --git a/cpu/ooo_cpu/ea_list.hh b/cpu/ozone/ea_list.hh index bc099d7f3..bc099d7f3 100644 --- a/cpu/ooo_cpu/ea_list.hh +++ b/cpu/ozone/ea_list.hh diff --git a/cpu/pc_event.cc b/cpu/pc_event.cc index f30e2a332..7d1e35eba 100644 --- a/cpu/pc_event.cc +++ b/cpu/pc_event.cc @@ -32,7 +32,7 @@ #include <utility> #include "base/trace.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #include "cpu/pc_event.hh" #include "sim/debug.hh" diff --git a/cpu/simple_cpu/simple_cpu.cc b/cpu/simple/cpu.cc index f20b537f2..306398ac2 100644 --- a/cpu/simple_cpu/simple_cpu.cc +++ b/cpu/simple/cpu.cc @@ -41,14 +41,14 @@ #include "base/misc.hh" #include "base/pollevent.hh" #include "base/range.hh" -#include "base/trace.hh" #include "base/stats/events.hh" -#include "cpu/base_cpu.hh" +#include "base/trace.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #include "cpu/exetrace.hh" -#include "cpu/full_cpu/smt.hh" -#include "cpu/sampling_cpu/sampling_cpu.hh" -#include "cpu/simple_cpu/simple_cpu.hh" +#include "cpu/sampler/sampler.hh" +#include "cpu/simple/cpu.hh" +#include "cpu/smt.hh" #include "cpu/static_inst.hh" #include "mem/base_mem.hh" #include "mem/mem_interface.hh" @@ -61,16 +61,14 @@ #ifdef FULL_SYSTEM #include "base/remote_gdb.hh" -#include "dev/alpha_access.h" -#include "dev/pciareg.h" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/system.hh" #include "targetarch/alpha_memory.hh" #include "targetarch/vtophys.hh" #else // !FULL_SYSTEM #include "eio/eio.hh" -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #endif // FULL_SYSTEM using namespace std; diff --git a/cpu/simple_cpu/simple_cpu.hh b/cpu/simple/cpu.hh index 2056ff707..9a0c2952a 100644 --- a/cpu/simple_cpu/simple_cpu.hh +++ b/cpu/simple/cpu.hh @@ -30,10 +30,10 @@ #define __CPU_SIMPLE_CPU_SIMPLE_CPU_HH__ #include "base/statistics.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #include "cpu/pc_event.hh" -#include "cpu/sampling_cpu/sampling_cpu.hh" +#include "cpu/sampler/sampler.hh" #include "cpu/static_inst.hh" #include "sim/eventq.hh" diff --git a/cpu/full_cpu/smt.hh b/cpu/smt.hh index 6a4151ffd..6a4151ffd 100644 --- a/cpu/full_cpu/smt.hh +++ b/cpu/smt.hh diff --git a/cpu/static_inst.hh b/cpu/static_inst.hh index 4bbe8b636..e80a12960 100644 --- a/cpu/static_inst.hh +++ b/cpu/static_inst.hh @@ -32,11 +32,10 @@ #include <bitset> #include <string> -#include "sim/host.hh" #include "base/hashmap.hh" #include "base/refcnt.hh" - -#include "cpu/full_cpu/op_class.hh" +#include "encumbered/cpu/full/op_class.hh" +#include "sim/host.hh" #include "targetarch/isa_traits.hh" // forward declarations diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc index 01ce17dd5..d08f7252e 100644 --- a/dev/alpha_console.cc +++ b/dev/alpha_console.cc @@ -37,16 +37,16 @@ #include "base/inifile.hh" #include "base/str.hh" // for to_number() #include "base/trace.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #include "dev/alpha_console.hh" #include "dev/simconsole.hh" #include "dev/simple_disk.hh" -#include "dev/tlaser_clock.hh" #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "sim/system.hh" #include "dev/tsunami_io.hh" diff --git a/dev/baddev.cc b/dev/baddev.cc index bb1d289ab..9b75a2a26 100644 --- a/dev/baddev.cc +++ b/dev/baddev.cc @@ -41,7 +41,7 @@ #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "sim/builder.hh" #include "sim/system.hh" diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc index 35d9020db..f4b27db3c 100644 --- a/dev/ide_ctrl.cc +++ b/dev/ide_ctrl.cc @@ -33,7 +33,6 @@ #include "base/trace.hh" #include "cpu/intr_control.hh" -#include "dev/dma.hh" #include "dev/ide_ctrl.hh" #include "dev/ide_disk.hh" #include "dev/pciconfigall.hh" @@ -43,8 +42,8 @@ #include "mem/bus/dma_interface.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "sim/sim_object.hh" diff --git a/dev/ide_disk.cc b/dev/ide_disk.cc index 28f7b634a..285b8a84c 100644 --- a/dev/ide_disk.cc +++ b/dev/ide_disk.cc @@ -42,7 +42,7 @@ #include "dev/ide_ctrl.hh" #include "dev/tsunami.hh" #include "dev/tsunami_pchip.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/physical.hh" #include "mem/bus/bus.hh" #include "mem/bus/dma_interface.hh" #include "mem/bus/pio_interface.hh" diff --git a/dev/io_device.hh b/dev/io_device.hh index 649706956..8ab88e6ff 100644 --- a/dev/io_device.hh +++ b/dev/io_device.hh @@ -29,7 +29,7 @@ #ifndef __DEV_IO_DEVICE_HH__ #define __DEV_IO_DEVICE_HH__ -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" class BaseInterface; class Bus; diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc index 637cd7825..d911d86c4 100644 --- a/dev/ns_gige.cc +++ b/dev/ns_gige.cc @@ -36,7 +36,6 @@ #include "base/inet.hh" #include "cpu/exec_context.hh" -#include "dev/dma.hh" #include "dev/etherlink.hh" #include "dev/ns_gige.hh" #include "dev/pciconfigall.hh" @@ -44,8 +43,8 @@ #include "mem/bus/dma_interface.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "sim/debug.hh" #include "sim/host.hh" diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc index fd0732d50..c7af8b1d1 100644 --- a/dev/pciconfigall.cc +++ b/dev/pciconfigall.cc @@ -42,7 +42,7 @@ #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "sim/builder.hh" #include "sim/system.hh" diff --git a/dev/pcidev.cc b/dev/pcidev.cc index 850635d49..9d568e6cc 100644 --- a/dev/pcidev.cc +++ b/dev/pcidev.cc @@ -39,11 +39,10 @@ #include "base/misc.hh" #include "base/str.hh" // for to_number #include "base/trace.hh" -#include "dev/pciareg.h" #include "dev/pcidev.hh" #include "dev/pciconfigall.hh" #include "mem/bus/bus.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "sim/builder.hh" #include "sim/param.hh" #include "sim/root.hh" diff --git a/dev/simconsole.cc b/dev/simconsole.cc index 94fd9ec1f..1d04e1f95 100644 --- a/dev/simconsole.cc +++ b/dev/simconsole.cc @@ -49,7 +49,7 @@ #include "dev/platform.hh" #include "dev/simconsole.hh" #include "dev/uart.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "sim/builder.hh" using namespace std; diff --git a/dev/simple_disk.cc b/dev/simple_disk.cc index 19e8683df..a33b4fe1b 100644 --- a/dev/simple_disk.cc +++ b/dev/simple_disk.cc @@ -42,7 +42,7 @@ #include "base/trace.hh" #include "dev/disk_image.hh" #include "dev/simple_disk.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" using namespace std; diff --git a/dev/simple_disk.hh b/dev/simple_disk.hh index 3031cdb8b..633acba0d 100644 --- a/dev/simple_disk.hh +++ b/dev/simple_disk.hh @@ -30,13 +30,14 @@ * Simple disk interface for the system console */ -#ifndef __SIMPLE_DISK_HH__ -#define __SIMPLE_DISK_HH__ +#ifndef __DEV_SIMPLE_DISK_HH__ +#define __DEV_SIMPLE_DISK_HH__ -#include "mem/functional_mem/physical_memory.hh" #include "sim/sim_object.hh" +#include "targetarch/isa_traits.hh" class DiskImage; +class PhysicalMemory; /* * Trivial interface to a disk image used by the System Console @@ -57,4 +58,5 @@ public: void read(Addr addr, baddr_t block, int count) const; void write(Addr addr, baddr_t block, int count); }; -#endif // __SIMPLE_DISK_HH__ + +#endif // __DEV_SIMPLE_DISK_HH__ diff --git a/dev/sinic.cc b/dev/sinic.cc index 5125a1d68..e5cd877a0 100644 --- a/dev/sinic.cc +++ b/dev/sinic.cc @@ -33,7 +33,6 @@ #include "base/inet.hh" #include "cpu/exec_context.hh" #include "cpu/intr_control.hh" -#include "dev/dma.hh" #include "dev/etherlink.hh" #include "dev/sinic.hh" #include "dev/pciconfigall.hh" @@ -41,8 +40,8 @@ #include "mem/bus/dma_interface.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "sim/debug.hh" #include "sim/eventq.hh" diff --git a/dev/tsunami.cc b/dev/tsunami.cc index 55a2c5ea6..d4398191b 100644 --- a/dev/tsunami.cc +++ b/dev/tsunami.cc @@ -32,9 +32,7 @@ #include "cpu/intr_control.hh" #include "dev/simconsole.hh" -#include "dev/etherdev.hh" #include "dev/ide_ctrl.hh" -#include "dev/tlaser_clock.hh" #include "dev/tsunami_cchip.hh" #include "dev/tsunami_pchip.hh" #include "dev/tsunami_io.hh" diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc index a10dba082..139ea578f 100644 --- a/dev/tsunami_cchip.cc +++ b/dev/tsunami_cchip.cc @@ -41,7 +41,7 @@ #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "cpu/intr_control.hh" #include "sim/builder.hh" #include "sim/system.hh" diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc index 2e12b41ea..2de064728 100644 --- a/dev/tsunami_io.cc +++ b/dev/tsunami_io.cc @@ -46,7 +46,7 @@ #include "dev/tsunami_cchip.hh" #include "dev/tsunamireg.h" #include "dev/rtcreg.h" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" using namespace std; diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc index f8bec77c0..4f3e2c529 100644 --- a/dev/tsunami_pchip.cc +++ b/dev/tsunami_pchip.cc @@ -41,8 +41,8 @@ #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "sim/system.hh" diff --git a/dev/uart.cc b/dev/uart.cc index c04a5d066..9d453af72 100644 --- a/dev/uart.cc +++ b/dev/uart.cc @@ -42,7 +42,7 @@ #include "mem/bus/bus.hh" #include "mem/bus/pio_interface.hh" #include "mem/bus/pio_interface_impl.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "sim/builder.hh" using namespace std; diff --git a/cpu/full_cpu/op_class.hh b/encumbered/cpu/full/op_class.hh index 8e85e8d8a..19b948651 100644 --- a/cpu/full_cpu/op_class.hh +++ b/encumbered/cpu/full/op_class.hh @@ -26,8 +26,8 @@ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. */ -#ifndef __OP_CLASS_HH__ -#define __OP_CLASS_HH__ +#ifndef __ENCUMBERED_CPU_FULL_OP_CLASS_HH__ +#define __ENCUMBERED_CPU_FULL_OP_CLASS_HH__ /** * @file @@ -61,4 +61,4 @@ enum OpClass { */ extern const char *opClassStrings[]; -#endif // __OP_CLASS_HH__ +#endif // __ENCUMBERED_CPU_FULL_OP_CLASS_HH__ diff --git a/kern/linux/linux_system.cc b/kern/linux/linux_system.cc index 5fa72735c..afc9f1d93 100644 --- a/kern/linux/linux_system.cc +++ b/kern/linux/linux_system.cc @@ -38,12 +38,12 @@ #include "base/loader/symtab.hh" #include "base/trace.hh" #include "cpu/exec_context.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "kern/linux/linux_events.hh" #include "kern/linux/linux_system.hh" #include "kern/system_events.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "dev/platform.hh" #include "targetarch/isa_traits.hh" diff --git a/kern/system_events.cc b/kern/system_events.cc index 9acf2f65a..eb21afcd1 100644 --- a/kern/system_events.cc +++ b/kern/system_events.cc @@ -27,9 +27,9 @@ */ #include "cpu/exec_context.hh" -#include "cpu/base_cpu.hh" -#include "cpu/full_cpu/bpred.hh" -#include "cpu/full_cpu/full_cpu.hh" +#include "cpu/base.hh" +#include "encumbered/cpu/full/bpred.hh" +#include "encumbered/cpu/full/cpu.hh" #include "kern/kernel_stats.hh" #include "kern/system_events.hh" #include "sim/system.hh" diff --git a/kern/tru64/tru64_events.cc b/kern/tru64/tru64_events.cc index f4300116e..247b58558 100644 --- a/kern/tru64/tru64_events.cc +++ b/kern/tru64/tru64_events.cc @@ -27,12 +27,12 @@ */ #include "cpu/exec_context.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "kern/system_events.hh" #include "kern/tru64/tru64_events.hh" #include "kern/tru64/dump_mbuf.hh" #include "kern/tru64/printf.hh" -#include "mem/functional_mem/memory_control.hh" +#include "mem/functional/memory_control.hh" #include "targetarch/arguments.hh" #include "targetarch/isa_traits.hh" diff --git a/kern/tru64/tru64_system.cc b/kern/tru64/tru64_system.cc index e0ec31a43..6914a9c54 100644 --- a/kern/tru64/tru64_system.cc +++ b/kern/tru64/tru64_system.cc @@ -28,13 +28,13 @@ #include "base/loader/symtab.hh" #include "base/trace.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "cpu/exec_context.hh" #include "kern/tru64/tru64_events.hh" #include "kern/tru64/tru64_system.hh" #include "kern/system_events.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "sim/builder.hh" #include "targetarch/isa_traits.hh" #include "targetarch/vtophys.hh" diff --git a/sim/eventq.cc b/sim/eventq.cc index 50158d06f..1fb8ef98a 100644 --- a/sim/eventq.cc +++ b/sim/eventq.cc @@ -33,7 +33,7 @@ #include <sstream> #include <vector> -#include "cpu/full_cpu/smt.hh" +#include "cpu/smt.hh" #include "base/misc.hh" #include "sim/eventq.hh" diff --git a/sim/main.cc b/sim/main.cc index ed8bf9e63..066f5f4c3 100644 --- a/sim/main.cc +++ b/sim/main.cc @@ -49,8 +49,8 @@ #include "base/statistics.hh" #include "base/str.hh" #include "base/time.hh" -#include "cpu/base_cpu.hh" -#include "cpu/full_cpu/smt.hh" +#include "cpu/base.hh" +#include "cpu/smt.hh" #include "python/pyconfig.hh" #include "sim/async.hh" #include "sim/builder.hh" diff --git a/sim/process.cc b/sim/process.cc index 3541fd040..e7a9afa9d 100644 --- a/sim/process.cc +++ b/sim/process.cc @@ -37,10 +37,10 @@ #include "base/loader/symtab.hh" #include "base/statistics.hh" #include "cpu/exec_context.hh" -#include "cpu/full_cpu/smt.hh" -#include "cpu/full_cpu/thread.hh" +#include "cpu/smt.hh" #include "eio/eio.hh" -#include "mem/functional_mem/main_memory.hh" +#include "encumbered/cpu/full/thread.hh" +#include "encumbered/mem/functional/main.hh" #include "sim/builder.hh" #include "sim/fake_syscall.hh" #include "sim/process.hh" diff --git a/sim/stat_control.cc b/sim/stat_control.cc index 37664dc65..578073efa 100644 --- a/sim/stat_control.cc +++ b/sim/stat_control.cc @@ -39,7 +39,7 @@ #include "base/str.hh" #include "base/time.hh" #include "base/stats/output.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "sim/eventq.hh" #include "sim/sim_object.hh" #include "sim/stat_control.hh" diff --git a/sim/syscall_emul.cc b/sim/syscall_emul.cc index 13df2b7a2..5abbdfd74 100644 --- a/sim/syscall_emul.cc +++ b/sim/syscall_emul.cc @@ -34,7 +34,7 @@ #include "sim/syscall_emul.hh" #include "base/trace.hh" #include "cpu/exec_context.hh" -#include "cpu/base_cpu.hh" +#include "cpu/base.hh" #include "sim/process.hh" #include "sim/sim_events.hh" diff --git a/sim/syscall_emul.hh b/sim/syscall_emul.hh index 26d3b873c..417531cc3 100644 --- a/sim/syscall_emul.hh +++ b/sim/syscall_emul.hh @@ -39,7 +39,7 @@ #include <string> #include "base/intmath.hh" // for RoundUp -#include "mem/functional_mem/functional_memory.hh" +#include "mem/functional/functional.hh" #include "targetarch/isa_traits.hh" // for Addr #include "base/trace.hh" diff --git a/sim/system.cc b/sim/system.cc index 8844f13de..70a1b8a32 100644 --- a/sim/system.cc +++ b/sim/system.cc @@ -31,8 +31,8 @@ #include "base/remote_gdb.hh" #include "cpu/exec_context.hh" #include "kern/kernel_stats.hh" -#include "mem/functional_mem/memory_control.hh" -#include "mem/functional_mem/physical_memory.hh" +#include "mem/functional/memory_control.hh" +#include "mem/functional/physical.hh" #include "targetarch/vtophys.hh" #include "sim/builder.hh" #include "sim/system.hh" |