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| author | marjanfariborz <mfariborz@ucdavis.edu> | 2019-12-02 15:03:02 -0800 |
|---|---|---|
| committer | Hoa Nguyen <hoanguyen@ucdavis.edu> | 2019-12-05 00:56:55 +0000 |
| commit | 18cbc34a56b91133ba9ea418bfaf793a43dc212a (patch) | |
| tree | 36a9ec5beb1a07b28631110bbb1b875f013e993d | |
| parent | f7cb03f493a0cf54579dc0f6a921fecde8cab193 (diff) | |
| download | gem5-18cbc34a56b91133ba9ea418bfaf793a43dc212a.tar.xz | |
arch-x86: Adding LDDQU instruction
Tested with simple c binaries.
Signed-off-by: marjanfariborz <mfariborz@ucdavis.edu>
Change-Id: I2f0852b136f966381d29af523e8ffdbca795afcd
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23262
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Jason Lowe-Power <jason@lowepower.com>
Tested-by: kokoro <noreply+kokoro@google.com>
| -rw-r--r-- | src/arch/x86/isa/decoder/two_byte_opcodes.isa | 2 | ||||
| -rw-r--r-- | src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py | 12 |
2 files changed, 12 insertions, 2 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa index 1e0924382..51154d5b8 100644 --- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa @@ -1067,7 +1067,7 @@ } // repne (0xF2) 0x8: decode OPCODE_OP_BOTTOM3 { - 0x0: WarnUnimpl::lddqu_Vo_Mo(); + 0x0: LDDQU(Vo,Mq); default: UD2(); } default: UD2(); diff --git a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py index 301aeaebd..8d147b922 100644 --- a/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py +++ b/src/arch/x86/isa/insts/simd128/integer/data_transfer/move.py @@ -123,5 +123,15 @@ def macroop MOVDQU_P_XMM { stfp xmml, seg, riprel, "DISPLACEMENT", dataSize=8 stfp xmmh, seg, riprel, "DISPLACEMENT + 8", dataSize=8 }; + +def macroop LDDQU_XMM_M { + ldfp xmml, seg, sib, "DISPLACEMENT", dataSize=8 + ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8 +}; + +def macroop LDDQU_XMM_P { + rdip t7 + ldfp xmml, seg, sib, "DISPLACEMENT", dataSize=8 + ldfp xmmh, seg, sib, "DISPLACEMENT + 8", dataSize=8 +}; ''' -# LDDQU |