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authorAndreas Sandberg <andreas.sandberg@arm.com>2016-08-10 15:27:13 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2016-08-10 15:27:13 +0100
commit26dc0017d2b3a786b3ee9ac4fd24cdae1ae83896 (patch)
treed1c4e1c024465b61438fc4269c3fb64d1e1905da
parent38d34ecf0dd9fdb231981aac0040378acc091631 (diff)
downloadgem5-26dc0017d2b3a786b3ee9ac4fd24cdae1ae83896.tar.xz
ruby: Implement support for functional accesses to PIO ranges
There are cases where we want to put boot ROMs on the PIO bus. Ruby currently doesn't support functional accesses to such memories since functional accesses are always assumed to go to physical memory. Add the required support for routing functional accesses to the PIO bus. Change-Id: Ia5b0fcbe87b9642bfd6ff98a55f71909d1a804e3 Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> Reviewed-by: Nikos Nikoleris <nikos.nikoleris@arm.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Reviewed-by: Brad Beckmann <brad.beckmann@amd.com> Reviewed-by: Michael LeBeane <michael.lebeane@amd.com>
-rw-r--r--configs/ruby/Ruby.py2
-rw-r--r--src/mem/ruby/system/RubyPort.cc5
2 files changed, 5 insertions, 2 deletions
diff --git a/configs/ruby/Ruby.py b/configs/ruby/Ruby.py
index 6d78dd89d..3ee92c2f6 100644
--- a/configs/ruby/Ruby.py
+++ b/configs/ruby/Ruby.py
@@ -194,6 +194,8 @@ def create_system(options, full_system, system, piobus = None, dma_ports = []):
# independent of the protocol and kept in the protocol-agnostic
# part (i.e. here).
sys_port_proxy = RubyPortProxy(ruby_system = ruby)
+ if piobus is not None:
+ sys_port_proxy.pio_master_port = piobus.slave
# Give the system port proxy a SimObject parent without creating a
# full-fledged controller
diff --git a/src/mem/ruby/system/RubyPort.cc b/src/mem/ruby/system/RubyPort.cc
index bf4002126..7f0e6f82d 100644
--- a/src/mem/ruby/system/RubyPort.cc
+++ b/src/mem/ruby/system/RubyPort.cc
@@ -312,9 +312,10 @@ RubyPort::MemSlavePort::recvFunctional(PacketPtr pkt)
// Check for pio requests and directly send them to the dedicated
// pio port.
if (!isPhysMemAddress(pkt->getAddr())) {
- assert(rp->memMasterPort.isConnected());
DPRINTF(RubyPort, "Pio Request for address: 0x%#x\n", pkt->getAddr());
- panic("RubyPort::PioMasterPort::recvFunctional() not implemented!\n");
+ assert(rp->pioMasterPort.isConnected());
+ rp->pioMasterPort.sendFunctional(pkt);
+ return;
}
assert(pkt->getAddr() + pkt->getSize() <=