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authorAndreas Hansson <andreas.hansson@arm.com>2015-01-20 08:12:45 -0500
committerAndreas Hansson <andreas.hansson@arm.com>2015-01-20 08:12:45 -0500
commit3cb9c361e2ad567f821f1377de77035a16390be1 (patch)
tree86fedcbbab03bd5aac665ca610331a1f9e792b50
parentde162ad96886cc78bd9c0fdb3417f8d8047f643b (diff)
downloadgem5-3cb9c361e2ad567f821f1377de77035a16390be1.tar.xz
scons: Do not build the InOrderCPU
One step closer to shifting focus to the MinorCPU.
-rw-r--r--build_opts/MIPS2
-rw-r--r--build_opts/SPARC2
-rw-r--r--configs/common/CpuConfig.py1
-rw-r--r--configs/example/se.py2
4 files changed, 3 insertions, 4 deletions
diff --git a/build_opts/MIPS b/build_opts/MIPS
index 82a9d6243..ecb2b0972 100644
--- a/build_opts/MIPS
+++ b/build_opts/MIPS
@@ -1,3 +1,3 @@
TARGET_ISA = 'mips'
-CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
+CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example'
diff --git a/build_opts/SPARC b/build_opts/SPARC
index e992b8cd9..63ec7cbaf 100644
--- a/build_opts/SPARC
+++ b/build_opts/SPARC
@@ -1,3 +1,3 @@
TARGET_ISA = 'sparc'
-CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU,InOrderCPU'
+CPU_MODELS = 'AtomicSimpleCPU,TimingSimpleCPU,O3CPU'
PROTOCOL = 'MI_example'
diff --git a/configs/common/CpuConfig.py b/configs/common/CpuConfig.py
index c2663ee98..f30e28246 100644
--- a/configs/common/CpuConfig.py
+++ b/configs/common/CpuConfig.py
@@ -50,7 +50,6 @@ _cpu_classes = {}
_cpu_aliases_all = [
("timing", "TimingSimpleCPU"),
("atomic", "AtomicSimpleCPU"),
- ("inorder", "InOrderCPU"),
("minor", "MinorCPU"),
("detailed", "DerivO3CPU"),
("kvm", ("ArmKvmCPU", "X86KvmCPU")),
diff --git a/configs/example/se.py b/configs/example/se.py
index eb8448270..3f51acdeb 100644
--- a/configs/example/se.py
+++ b/configs/example/se.py
@@ -110,7 +110,7 @@ def get_processes(options):
idx += 1
if options.smt:
- assert(options.cpu_type == "detailed" or options.cpu_type == "inorder")
+ assert(options.cpu_type == "detailed")
return multiprocesses, idx
else:
return multiprocesses, 1