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authorGabe Black <gblack@eecs.umich.edu>2011-09-30 00:28:33 -0700
committerGabe Black <gblack@eecs.umich.edu>2011-09-30 00:28:33 -0700
commit51f7a6666027870c24432dcaa56cfc1b4741fdc6 (patch)
tree6dd74cdab55616bae7c974bc6c4fc39e60c9808a
parent35e20c7470a16cbc1187553375269800b980eb78 (diff)
downloadgem5-51f7a6666027870c24432dcaa56cfc1b4741fdc6.tar.xz
SE/FS: Build the devices in SE mode.
-rw-r--r--src/arch/sparc/isa_traits.hh4
-rw-r--r--src/base/vnc/SConscript8
-rw-r--r--src/cpu/SConscript5
-rw-r--r--src/cpu/intr_control.cc8
-rw-r--r--src/dev/SConscript144
-rw-r--r--src/dev/alpha/AlphaBackdoor.py4
-rw-r--r--src/dev/alpha/SConscript2
-rw-r--r--src/dev/alpha/backdoor.cc11
-rw-r--r--src/dev/alpha/backdoor.hh2
-rw-r--r--src/dev/alpha/tsunami.cc2
-rw-r--r--src/dev/arm/SConscript2
-rw-r--r--src/dev/arm/gic.cc1
-rw-r--r--src/dev/arm/realview.cc2
-rwxr-xr-xsrc/dev/mips/SConscript2
-rwxr-xr-xsrc/dev/mips/malta.cc3
-rwxr-xr-xsrc/dev/mips/malta_cchip.cc1
-rwxr-xr-xsrc/dev/mips/malta_io.cc1
-rwxr-xr-xsrc/dev/mips/malta_pchip.cc1
-rw-r--r--src/dev/simple_disk.cc2
-rw-r--r--src/dev/sparc/SConscript2
-rw-r--r--src/dev/sparc/iob.cc1
-rw-r--r--src/dev/sparc/t1000.cc2
-rw-r--r--src/dev/x86/SConscript2
-rw-r--r--src/dev/x86/i82094aa.cc7
-rw-r--r--src/dev/x86/pc.cc2
25 files changed, 129 insertions, 92 deletions
diff --git a/src/arch/sparc/isa_traits.hh b/src/arch/sparc/isa_traits.hh
index 620d9c402..9b02a4d80 100644
--- a/src/arch/sparc/isa_traits.hh
+++ b/src/arch/sparc/isa_traits.hh
@@ -35,7 +35,6 @@
#include "arch/sparc/sparc_traits.hh"
#include "arch/sparc/types.hh"
#include "base/types.hh"
-#include "config/full_system.hh"
#include "cpu/static_inst_fwd.hh"
namespace BigEndianGuest {}
@@ -78,7 +77,6 @@ const Addr VAddrAMask = ULL(0xFFFFFFFF);
const Addr PAddrImplMask = ULL(0x000000FFFFFFFFFF);
const Addr BytesInPageMask = ULL(0x1FFF);
-#if FULL_SYSTEM
enum InterruptTypes
{
IT_TRAP_LEVEL_ZERO,
@@ -91,8 +89,6 @@ enum InterruptTypes
NumInterruptTypes
};
-#endif
-
// Memory accesses cannot be unaligned
const bool HasUnalignedMemAcc = false;
}
diff --git a/src/base/vnc/SConscript b/src/base/vnc/SConscript
index 089509b9b..62448cd70 100644
--- a/src/base/vnc/SConscript
+++ b/src/base/vnc/SConscript
@@ -39,10 +39,8 @@
Import('*')
-if env['FULL_SYSTEM']:
- SimObject('VncServer.py')
- Source('vncserver.cc')
- DebugFlag('VNC')
-
Source('convert.cc')
+SimObject('VncServer.py')
+Source('vncserver.cc')
+DebugFlag('VNC')
diff --git a/src/cpu/SConscript b/src/cpu/SConscript
index a1074cb8b..370b83909 100644
--- a/src/cpu/SConscript
+++ b/src/cpu/SConscript
@@ -109,6 +109,7 @@ SimObject('BaseCPU.py')
SimObject('FuncUnit.py')
SimObject('ExeTracer.py')
SimObject('IntelTrace.py')
+SimObject('IntrControl.py')
SimObject('NativeTrace.py')
Source('activity.cc')
@@ -118,6 +119,7 @@ Source('decode.cc')
Source('exetrace.cc')
Source('func_unit.cc')
Source('inteltrace.cc')
+Source('intr_control.cc')
Source('nativetrace.cc')
Source('pc_event.cc')
Source('quiesce_event.cc')
@@ -127,9 +129,6 @@ Source('thread_context.cc')
Source('thread_state.cc')
if env['FULL_SYSTEM']:
- SimObject('IntrControl.py')
-
- Source('intr_control.cc')
Source('profile.cc')
if env['TARGET_ISA'] == 'sparc':
diff --git a/src/cpu/intr_control.cc b/src/cpu/intr_control.cc
index 8f3808889..62be4ea19 100644
--- a/src/cpu/intr_control.cc
+++ b/src/cpu/intr_control.cc
@@ -48,19 +48,27 @@ IntrControl::IntrControl(const Params *p)
void
IntrControl::post(int cpu_id, int int_num, int index)
{
+#if FULL_SYSTEM
DPRINTF(IntrControl, "post %d:%d (cpu %d)\n", int_num, index, cpu_id);
std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr();
cpu->postInterrupt(int_num, index);
+#else
+ panic("Called IntrControl::post in SE mode.\n");
+#endif
}
void
IntrControl::clear(int cpu_id, int int_num, int index)
{
+#if FULL_SYSTEM
DPRINTF(IntrControl, "clear %d:%d (cpu %d)\n", int_num, index, cpu_id);
std::vector<ThreadContext *> &tcvec = sys->threadContexts;
BaseCPU *cpu = tcvec[cpu_id]->getCpuPtr();
cpu->clearInterrupt(int_num, index);
+#else
+ panic("Called IntrControl::clear in SE mode.\n");
+#endif
}
IntrControl *
diff --git a/src/dev/SConscript b/src/dev/SConscript
index 744e7b3c1..c041081b5 100644
--- a/src/dev/SConscript
+++ b/src/dev/SConscript
@@ -34,79 +34,77 @@ Import('*')
if env['TARGET_ISA'] == 'no':
Return()
-if env['FULL_SYSTEM']:
- SimObject('BadDevice.py')
- SimObject('CopyEngine.py')
- SimObject('Device.py')
- SimObject('DiskImage.py')
- SimObject('Ethernet.py')
- SimObject('Ide.py')
- SimObject('Pci.py')
- SimObject('Platform.py')
- SimObject('SimpleDisk.py')
- SimObject('Terminal.py')
- SimObject('Uart.py')
+SimObject('BadDevice.py')
+SimObject('CopyEngine.py')
+SimObject('Device.py')
+SimObject('DiskImage.py')
+SimObject('Ethernet.py')
+SimObject('Ide.py')
+SimObject('Pci.py')
+SimObject('Platform.py')
+SimObject('SimpleDisk.py')
+SimObject('Terminal.py')
+SimObject('Uart.py')
- Source('baddev.cc')
- Source('copy_engine.cc')
- Source('disk_image.cc')
- Source('etherbus.cc')
- Source('etherdevice.cc')
- Source('etherdump.cc')
- Source('etherint.cc')
- Source('etherlink.cc')
- Source('etherpkt.cc')
- Source('ethertap.cc')
- Source('i8254xGBe.cc')
- Source('ide_ctrl.cc')
- Source('ide_disk.cc')
- Source('intel_8254_timer.cc')
- Source('io_device.cc')
- Source('isa_fake.cc')
- Source('mc146818.cc')
- Source('ns_gige.cc')
- Source('pciconfigall.cc')
- Source('pcidev.cc')
- Source('pktfifo.cc')
- Source('platform.cc')
- Source('ps2.cc')
- Source('simple_disk.cc')
- Source('sinic.cc')
- Source('terminal.cc')
- Source('uart.cc')
- Source('uart8250.cc')
+Source('baddev.cc')
+Source('copy_engine.cc')
+Source('disk_image.cc')
+Source('etherbus.cc')
+Source('etherdevice.cc')
+Source('etherdump.cc')
+Source('etherint.cc')
+Source('etherlink.cc')
+Source('etherpkt.cc')
+Source('ethertap.cc')
+Source('i8254xGBe.cc')
+Source('ide_ctrl.cc')
+Source('ide_disk.cc')
+Source('intel_8254_timer.cc')
+Source('io_device.cc')
+Source('isa_fake.cc')
+Source('mc146818.cc')
+Source('ns_gige.cc')
+Source('pciconfigall.cc')
+Source('pcidev.cc')
+Source('pktfifo.cc')
+Source('platform.cc')
+Source('ps2.cc')
+Source('simple_disk.cc')
+Source('sinic.cc')
+Source('terminal.cc')
+Source('uart.cc')
+Source('uart8250.cc')
- DebugFlag('DiskImageRead')
- DebugFlag('DiskImageWrite')
- DebugFlag('DMA')
- DebugFlag('DMACopyEngine')
- DebugFlag('Ethernet')
- DebugFlag('EthernetCksum')
- DebugFlag('EthernetDMA')
- DebugFlag('EthernetData')
- DebugFlag('EthernetDesc')
- DebugFlag('EthernetEEPROM')
- DebugFlag('EthernetIntr')
- DebugFlag('EthernetPIO')
- DebugFlag('EthernetSM')
- DebugFlag('IdeCtrl')
- DebugFlag('IdeDisk')
- DebugFlag('Intel8254Timer')
- DebugFlag('IsaFake')
- DebugFlag('MC146818')
- DebugFlag('PCIDEV')
- DebugFlag('PciConfigAll')
- DebugFlag('SimpleDisk')
- DebugFlag('SimpleDiskData')
- DebugFlag('Terminal')
- DebugFlag('TerminalVerbose')
- DebugFlag('Uart')
-
- CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
- CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
- 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
- 'EthernetCksum', 'EthernetEEPROM' ])
- CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
- 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
- CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])
+DebugFlag('DiskImageRead')
+DebugFlag('DiskImageWrite')
+DebugFlag('DMA')
+DebugFlag('DMACopyEngine')
+DebugFlag('Ethernet')
+DebugFlag('EthernetCksum')
+DebugFlag('EthernetDMA')
+DebugFlag('EthernetData')
+DebugFlag('EthernetDesc')
+DebugFlag('EthernetEEPROM')
+DebugFlag('EthernetIntr')
+DebugFlag('EthernetPIO')
+DebugFlag('EthernetSM')
+DebugFlag('IdeCtrl')
+DebugFlag('IdeDisk')
+DebugFlag('Intel8254Timer')
+DebugFlag('IsaFake')
+DebugFlag('MC146818')
+DebugFlag('PCIDEV')
+DebugFlag('PciConfigAll')
+DebugFlag('SimpleDisk')
+DebugFlag('SimpleDiskData')
+DebugFlag('Terminal')
+DebugFlag('TerminalVerbose')
+DebugFlag('Uart')
+CompoundFlag('DiskImageAll', [ 'DiskImageRead', 'DiskImageWrite' ])
+CompoundFlag('EthernetAll', [ 'Ethernet', 'EthernetPIO', 'EthernetDMA',
+ 'EthernetData' , 'EthernetDesc', 'EthernetIntr', 'EthernetSM',
+ 'EthernetCksum', 'EthernetEEPROM' ])
+CompoundFlag('EthernetNoData', [ 'Ethernet', 'EthernetPIO', 'EthernetDesc',
+ 'EthernetIntr', 'EthernetSM', 'EthernetCksum' ])
+CompoundFlag('IdeAll', [ 'IdeCtrl', 'IdeDisk' ])
diff --git a/src/dev/alpha/AlphaBackdoor.py b/src/dev/alpha/AlphaBackdoor.py
index fa9627164..f7402f593 100644
--- a/src/dev/alpha/AlphaBackdoor.py
+++ b/src/dev/alpha/AlphaBackdoor.py
@@ -26,6 +26,7 @@
#
# Authors: Nathan Binkert
+from m5.defines import buildEnv
from m5.params import *
from m5.proxy import *
from Device import BasicPioDevice
@@ -35,4 +36,5 @@ class AlphaBackdoor(BasicPioDevice):
cpu = Param.BaseCPU(Parent.cpu[0], "Processor")
disk = Param.SimpleDisk("Simple Disk")
terminal = Param.Terminal(Parent.any, "The console terminal")
- system = Param.AlphaSystem(Parent.any, "system object")
+ if buildEnv['FULL_SYSTEM']: # No AlphaSystem in SE mode.
+ system = Param.AlphaSystem(Parent.any, "system object")
diff --git a/src/dev/alpha/SConscript b/src/dev/alpha/SConscript
index 32baa6f48..9c8a5b4ce 100644
--- a/src/dev/alpha/SConscript
+++ b/src/dev/alpha/SConscript
@@ -31,7 +31,7 @@
Import('*')
-if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'alpha':
+if env['TARGET_ISA'] == 'alpha':
SimObject('AlphaBackdoor.py')
SimObject('Tsunami.py')
diff --git a/src/dev/alpha/backdoor.cc b/src/dev/alpha/backdoor.cc
index 31ab62866..4d9d046de 100644
--- a/src/dev/alpha/backdoor.cc
+++ b/src/dev/alpha/backdoor.cc
@@ -38,7 +38,11 @@
#include <cstddef>
#include <string>
+#include "config/full_system.hh"
+
+#if FULL_SYSTEM //XXX No AlphaSystem in SE mode.
#include "arch/alpha/system.hh"
+#endif
#include "base/inifile.hh"
#include "base/str.hh"
#include "base/trace.hh"
@@ -60,7 +64,10 @@ using namespace AlphaISA;
AlphaBackdoor::AlphaBackdoor(const Params *p)
: BasicPioDevice(p), disk(p->disk), terminal(p->terminal),
- system(p->system), cpu(p->cpu)
+#if FULL_SYSTEM //XXX No system pointer in SE mode.
+ system(p->system),
+#endif
+ cpu(p->cpu)
{
pioSize = sizeof(struct AlphaAccess);
@@ -84,6 +91,7 @@ AlphaBackdoor::AlphaBackdoor(const Params *p)
void
AlphaBackdoor::startup()
{
+#if FULL_SYSTEM //XXX No system pointer in SE mode.
system->setAlphaAccess(pioAddr);
alphaAccess->numCPUs = system->numContexts();
alphaAccess->kernStart = system->getKernelStart();
@@ -92,6 +100,7 @@ AlphaBackdoor::startup()
alphaAccess->mem_size = system->physmem->size();
alphaAccess->cpuClock = cpu->frequency() / 1000000; // In MHz
alphaAccess->intrClockFrequency = params()->platform->intrFrequency();
+#endif
}
Tick
diff --git a/src/dev/alpha/backdoor.hh b/src/dev/alpha/backdoor.hh
index 2acaba9a3..5249ce71f 100644
--- a/src/dev/alpha/backdoor.hh
+++ b/src/dev/alpha/backdoor.hh
@@ -92,8 +92,10 @@ class AlphaBackdoor : public BasicPioDevice
/** the system console (the terminal) is accessable from the console */
Terminal *terminal;
+#if FULL_SYSTEM //XXX No AlphaSystem defined in SE mode.
/** a pointer to the system we are running in */
AlphaSystem *system;
+#endif
/** a pointer to the CPU boot cpu */
BaseCPU *cpu;
diff --git a/src/dev/alpha/tsunami.cc b/src/dev/alpha/tsunami.cc
index 34aab6ed0..16e2bfb28 100644
--- a/src/dev/alpha/tsunami.cc
+++ b/src/dev/alpha/tsunami.cc
@@ -52,8 +52,10 @@ using namespace TheISA;
Tsunami::Tsunami(const Params *p)
: Platform(p), system(p->system)
{
+#if FULL_SYSTEM //XXX No platform pointer in SE mode.
// set the back pointer from the system to myself
system->platform = this;
+#endif
for (int i = 0; i < Tsunami::Max_CPUs; i++)
intr_sum_type[i] = 0;
diff --git a/src/dev/arm/SConscript b/src/dev/arm/SConscript
index 07a3e14ae..deedcb49f 100644
--- a/src/dev/arm/SConscript
+++ b/src/dev/arm/SConscript
@@ -39,7 +39,7 @@
Import('*')
-if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'arm':
+if env['TARGET_ISA'] == 'arm':
SimObject('RealView.py')
Source('a9scu.cc')
diff --git a/src/dev/arm/gic.cc b/src/dev/arm/gic.cc
index 2dac18c08..ddea4873f 100644
--- a/src/dev/arm/gic.cc
+++ b/src/dev/arm/gic.cc
@@ -45,6 +45,7 @@
#include "debug/Checkpoint.hh"
#include "debug/GIC.hh"
#include "debug/IPI.hh"
+#include "debug/Interrupt.hh"
#include "dev/arm/gic.hh"
#include "dev/arm/realview.hh"
#include "dev/terminal.hh"
diff --git a/src/dev/arm/realview.cc b/src/dev/arm/realview.cc
index 8cc318f89..ed6365efc 100644
--- a/src/dev/arm/realview.cc
+++ b/src/dev/arm/realview.cc
@@ -61,8 +61,10 @@ using namespace TheISA;
RealView::RealView(const Params *p)
: Platform(p), system(p->system)
{
+#if FULL_SYSTEM //XXX No platform pointer on the system object in SE mode.
// set the back pointer from the system to myself
system->platform = this;
+#endif
}
Tick
diff --git a/src/dev/mips/SConscript b/src/dev/mips/SConscript
index 369dbfed2..801b1916d 100755
--- a/src/dev/mips/SConscript
+++ b/src/dev/mips/SConscript
@@ -31,7 +31,7 @@
Import('*')
-if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'mips':
+if env['TARGET_ISA'] == 'mips':
SimObject('Malta.py')
DebugFlag('Malta')
diff --git a/src/dev/mips/malta.cc b/src/dev/mips/malta.cc
index bcf970745..df949c2cf 100755
--- a/src/dev/mips/malta.cc
+++ b/src/dev/mips/malta.cc
@@ -39,6 +39,7 @@
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
+#include "debug/Malta.hh"
#include "dev/mips/malta.hh"
#include "dev/mips/malta_cchip.hh"
#include "dev/mips/malta_io.hh"
@@ -53,8 +54,10 @@ using namespace TheISA;
Malta::Malta(const Params *p)
: Platform(p), system(p->system)
{
+#if FULL_SYSTEM //XXX No platform pointer on the system object in SE mode.
// set the back pointer from the system to myself
system->platform = this;
+#endif
for (int i = 0; i < Malta::Max_CPUs; i++)
intr_sum_type[i] = 0;
diff --git a/src/dev/mips/malta_cchip.cc b/src/dev/mips/malta_cchip.cc
index b2d5069c5..e5eafeec2 100755
--- a/src/dev/mips/malta_cchip.cc
+++ b/src/dev/mips/malta_cchip.cc
@@ -42,6 +42,7 @@
#include "config/the_isa.hh"
#include "cpu/intr_control.hh"
#include "cpu/thread_context.hh"
+#include "debug/Malta.hh"
#include "dev/mips/malta.hh"
#include "dev/mips/malta_cchip.hh"
#include "dev/mips/maltareg.h"
diff --git a/src/dev/mips/malta_io.cc b/src/dev/mips/malta_io.cc
index bd9288487..1ae5442bf 100755
--- a/src/dev/mips/malta_io.cc
+++ b/src/dev/mips/malta_io.cc
@@ -43,6 +43,7 @@
#include "base/time.hh"
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/Malta.hh"
#include "dev/mips/malta.hh"
#include "dev/mips/malta_cchip.hh"
#include "dev/mips/malta_io.hh"
diff --git a/src/dev/mips/malta_pchip.cc b/src/dev/mips/malta_pchip.cc
index 7832a31bd..dd1993cc6 100755
--- a/src/dev/mips/malta_pchip.cc
+++ b/src/dev/mips/malta_pchip.cc
@@ -39,6 +39,7 @@
#include "base/trace.hh"
#include "config/the_isa.hh"
+#include "debug/Malta.hh"
#include "dev/mips/malta.hh"
#include "dev/mips/malta_pchip.hh"
#include "dev/mips/maltareg.h"
diff --git a/src/dev/simple_disk.cc b/src/dev/simple_disk.cc
index 4bf24b1cd..890c90dbf 100644
--- a/src/dev/simple_disk.cc
+++ b/src/dev/simple_disk.cc
@@ -70,7 +70,9 @@ SimpleDisk::read(Addr addr, baddr_t block, int count) const
for (int i = 0, j = 0; i < count; i += SectorSize, j++)
image->read(data + i, block + j);
+#if FULL_SYSTEM //XXX No functional port in SE mode.
system->functionalPort->writeBlob(addr, data, count);
+#endif
DPRINTF(SimpleDisk, "read block=%#x len=%d\n", (uint64_t)block, count);
DDUMP(SimpleDiskData, data, count);
diff --git a/src/dev/sparc/SConscript b/src/dev/sparc/SConscript
index 772aa4864..e82e5ee05 100644
--- a/src/dev/sparc/SConscript
+++ b/src/dev/sparc/SConscript
@@ -31,7 +31,7 @@
Import('*')
-if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'sparc':
+if env['TARGET_ISA'] == 'sparc':
SimObject('T1000.py')
Source('dtod.cc')
diff --git a/src/dev/sparc/iob.cc b/src/dev/sparc/iob.cc
index 748a08c81..cbb0bbde0 100644
--- a/src/dev/sparc/iob.cc
+++ b/src/dev/sparc/iob.cc
@@ -42,6 +42,7 @@
#include "base/bitfield.hh"
#include "base/trace.hh"
#include "cpu/intr_control.hh"
+#include "cpu/thread_context.hh"
#include "debug/Iob.hh"
#include "dev/sparc/iob.hh"
#include "dev/platform.hh"
diff --git a/src/dev/sparc/t1000.cc b/src/dev/sparc/t1000.cc
index c00d942c9..2c3d3c071 100644
--- a/src/dev/sparc/t1000.cc
+++ b/src/dev/sparc/t1000.cc
@@ -49,8 +49,10 @@ using namespace TheISA;
T1000::T1000(const Params *p)
: Platform(p), system(p->system)
{
+#if FULL_SYSTEM //XXX No platform pointer on system objects in SE mode.
// set the back pointer from the system to myself
system->platform = this;
+#endif
}
Tick
diff --git a/src/dev/x86/SConscript b/src/dev/x86/SConscript
index eeb68cf44..038e4824b 100644
--- a/src/dev/x86/SConscript
+++ b/src/dev/x86/SConscript
@@ -30,7 +30,7 @@
Import('*')
-if env['FULL_SYSTEM'] and env['TARGET_ISA'] == 'x86':
+if env['TARGET_ISA'] == 'x86':
SimObject('Pc.py')
Source('pc.cc')
diff --git a/src/dev/x86/i82094aa.cc b/src/dev/x86/i82094aa.cc
index 584090a9e..be7852e86 100644
--- a/src/dev/x86/i82094aa.cc
+++ b/src/dev/x86/i82094aa.cc
@@ -28,7 +28,12 @@
* Authors: Gabe Black
*/
+#include "config/full_system.hh"
+
+#if FULL_SYSTEM
#include "arch/x86/interrupts.hh"
+#endif
+
#include "arch/x86/intmessage.hh"
#include "debug/I82094AA.hh"
#include "dev/x86/i82094aa.hh"
@@ -167,6 +172,7 @@ X86ISA::I82094AA::signalInterrupt(int line)
DPRINTF(I82094AA, "Entry was masked.\n");
return;
} else {
+#if FULL_SYSTEM //XXX No interrupt controller in SE mode.
TriggerIntMessage message = 0;
message.destination = entry.dest;
if (entry.deliveryMode == DeliveryMode::ExtInt) {
@@ -225,6 +231,7 @@ X86ISA::I82094AA::signalInterrupt(int line)
}
intPort->sendMessage(apics, message,
sys->getMemoryMode() == Enums::timing);
+#endif
}
}
diff --git a/src/dev/x86/pc.cc b/src/dev/x86/pc.cc
index 7912a45e1..ec2bb209c 100644
--- a/src/dev/x86/pc.cc
+++ b/src/dev/x86/pc.cc
@@ -56,7 +56,9 @@ Pc::Pc(const Params *p)
{
southBridge = NULL;
// set the back pointer from the system to myself
+#if FULL_SYSTEM //XXX No platform pointer in SE mode.
system->platform = this;
+#endif
}
void