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| author | Gabe Black <gblack@eecs.umich.edu> | 2009-07-19 23:51:41 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2009-07-19 23:51:41 -0700 |
| commit | 563654275f7703245407da2406202f4e5cae96a8 (patch) | |
| tree | 6a857fff91504cfaaf9d51a672ba86edf8684e72 | |
| parent | d85cd08113e61817fdf1df978f2713ba8b094996 (diff) | |
| download | gem5-563654275f7703245407da2406202f4e5cae96a8.tar.xz | |
X86: Add some misc registers for FP control state.
| -rw-r--r-- | src/arch/x86/miscregs.hh | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/arch/x86/miscregs.hh b/src/arch/x86/miscregs.hh index 2dc4587e3..5ab402867 100644 --- a/src/arch/x86/miscregs.hh +++ b/src/arch/x86/miscregs.hh @@ -374,6 +374,17 @@ namespace X86ISA MISCREG_X87_TOP = MISCREG_SEG_ATTR_BASE + NUM_SEGMENTREGS, + MISCREG_MXCSR, + MISCREG_FCW, + MISCREG_FSW, + MISCREG_FTW, + MISCREG_FTAG, + MISCREG_FISEG, + MISCREG_FIOFF, + MISCREG_FOSEG, + MISCREG_FOOFF, + MISCREG_FOP, + //XXX Add "Model-Specific Registers" MISCREG_APIC_BASE, |