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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-04-09 09:30:43 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-04-11 09:01:31 +0000 |
| commit | 740756e97736ad6b65dcb651c2f1f69cc1282781 (patch) | |
| tree | 549488f783ecd705f82883e685c27127b2a16fd6 | |
| parent | 680a689fd6ca844b373bf2c5ba9028b7b563a356 (diff) | |
| download | gem5-740756e97736ad6b65dcb651c2f1f69cc1282781.tar.xz | |
arch-arm: Enable PMSELR_EL0 read in PMU
Change-Id: Ic1ec1d03464a7ce42295cee8a9f4ebcd3e90def1
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/17948
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
| -rw-r--r-- | src/arch/arm/pmu.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/pmu.cc b/src/arch/arm/pmu.cc index 62353cf2b..93d4f5efb 100644 --- a/src/arch/arm/pmu.cc +++ b/src/arch/arm/pmu.cc @@ -333,6 +333,7 @@ PMU::readMiscRegInt(int misc_reg) case MISCREG_PMSWINC: // Software Increment Register (RAZ) return 0; + case MISCREG_PMSELR_EL0: case MISCREG_PMSELR: return reg_pmselr; |