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authorGabe Black <gabeblack@google.com>2019-10-28 20:58:14 -0700
committerGabe Black <gabeblack@google.com>2019-10-30 22:29:23 +0000
commitcbf20899528f523db38b78c32d27dcb8fc8485fd (patch)
treedfc3783ee8424c8b531c47ee45fdf23736ae25d5
parent591240dba1a8cba6c688b17e73181a4d6c220a4b (diff)
downloadgem5-cbf20899528f523db38b78c32d27dcb8fc8485fd.tar.xz
sim: Add a getGuestByteOrder accessor to the system class.
This goes along with the existing getPageBytes, etc., accessors, and paves the way for this to be a parameter of the System class. Change-Id: Ibfe2d591185d23beccdd5bbff1092dc07b1278ac Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22272 Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com> Maintainer: Andreas Sandberg <andreas.sandberg@arm.com> Tested-by: kokoro <noreply+kokoro@google.com>
-rw-r--r--src/sim/system.hh13
1 files changed, 13 insertions, 0 deletions
diff --git a/src/sim/system.hh b/src/sim/system.hh
index d205ffb7a..338b12619 100644
--- a/src/sim/system.hh
+++ b/src/sim/system.hh
@@ -283,6 +283,19 @@ class System : public SimObject, public PCEventScope
*/
Arch getArch() const { return Arch::TheISA; }
+ /**
+ * Get the guest byte order.
+ */
+ ByteOrder
+ getGuestByteOrder() const
+ {
+#if THE_ISA != NULL_ISA
+ return TheISA::GuestByteOrder;
+#else
+ panic("The NULL ISA has no endianness.");
+#endif
+ }
+
/**
* Get the page bytes for the ISA.
*/