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authorSean Wilson <spwilson2@wisc.edu>2017-06-07 12:13:16 -0500
committerSean Wilson <spwilson2@wisc.edu>2017-06-20 18:03:21 +0000
commitebe5f0df9a6158ec4ed84429d1619f388eb1388b (patch)
treec3070d745a0820856a044313860c8edede236be8
parent8421362cc23a6341e44ce59f2c4f578438fd8a55 (diff)
downloadgem5-ebe5f0df9a6158ec4ed84429d1619f388eb1388b.tar.xz
cpu, gpu-compute: Replace EventWrapper use with EventFunctionWrapper
Change-Id: Idd5992463bcf9154f823b82461070d1f1842cea3 Signed-off-by: Sean Wilson <spwilson2@wisc.edu> Reviewed-on: https://gem5-review.googlesource.com/3746 Reviewed-by: Anthony Gutierrez <anthony.gutierrez@amd.com> Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
-rw-r--r--src/cpu/base.cc4
-rw-r--r--src/cpu/kvm/base.cc3
-rw-r--r--src/cpu/o3/probe/elastic_trace.cc2
-rw-r--r--src/cpu/o3/probe/elastic_trace.hh3
-rw-r--r--src/cpu/simple/timing.cc2
-rw-r--r--src/cpu/simple/timing.hh8
-rw-r--r--src/cpu/testers/memtest/memtest.cc6
-rw-r--r--src/cpu/testers/memtest/memtest.hh6
-rw-r--r--src/cpu/testers/traffic_gen/traffic_gen.cc4
-rw-r--r--src/cpu/testers/traffic_gen/traffic_gen.hh4
-rw-r--r--src/cpu/trace/trace_cpu.cc4
-rw-r--r--src/cpu/trace/trace_cpu.hh4
-rw-r--r--src/gpu-compute/gpu_tlb.cc4
-rw-r--r--src/gpu-compute/gpu_tlb.hh4
14 files changed, 29 insertions, 29 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc
index 08f95ea49..6f460d3af 100644
--- a/src/cpu/base.cc
+++ b/src/cpu/base.cc
@@ -229,8 +229,8 @@ BaseCPU::BaseCPU(Params *p, bool is_checker)
if (p->function_trace_start == 0) {
functionTracingEnabled = true;
} else {
- typedef EventWrapper<BaseCPU, &BaseCPU::enableFunctionTrace> wrap;
- Event *event = new wrap(this, true);
+ Event *event = new EventFunctionWrapper(
+ [this]{ enableFunctionTrace(); }, name(), true);
schedule(event, p->function_trace_start);
}
}
diff --git a/src/cpu/kvm/base.cc b/src/cpu/kvm/base.cc
index 6ae3c7dff..23a408084 100644
--- a/src/cpu/kvm/base.cc
+++ b/src/cpu/kvm/base.cc
@@ -164,8 +164,7 @@ BaseKvmCPU::startup()
thread->startup();
Event *startupEvent(
- new EventWrapper<BaseKvmCPU,
- &BaseKvmCPU::startupThread>(this, true));
+ new EventFunctionWrapper([this]{ startupThread(); }, name(), true));
schedule(startupEvent, curTick());
}
diff --git a/src/cpu/o3/probe/elastic_trace.cc b/src/cpu/o3/probe/elastic_trace.cc
index bf6b6f002..c97bf7877 100644
--- a/src/cpu/o3/probe/elastic_trace.cc
+++ b/src/cpu/o3/probe/elastic_trace.cc
@@ -50,7 +50,7 @@
ElasticTrace::ElasticTrace(const ElasticTraceParams* params)
: ProbeListenerObject(params),
- regEtraceListenersEvent(this),
+ regEtraceListenersEvent([this]{ regEtraceListeners(); }, name()),
firstWin(true),
lastClearedSeqNum(0),
depWindowSize(params->depWindowSize),
diff --git a/src/cpu/o3/probe/elastic_trace.hh b/src/cpu/o3/probe/elastic_trace.hh
index 584cdf182..08e02daef 100644
--- a/src/cpu/o3/probe/elastic_trace.hh
+++ b/src/cpu/o3/probe/elastic_trace.hh
@@ -182,8 +182,7 @@ class ElasticTrace : public ProbeListenerObject
void regStats();
/** Event to trigger registering this listener for all probe points. */
- EventWrapper<ElasticTrace,
- &ElasticTrace::regEtraceListeners> regEtraceListenersEvent;
+ EventFunctionWrapper regEtraceListenersEvent;
private:
/**
diff --git a/src/cpu/simple/timing.cc b/src/cpu/simple/timing.cc
index 1c468dc99..d2cb6ee21 100644
--- a/src/cpu/simple/timing.cc
+++ b/src/cpu/simple/timing.cc
@@ -80,7 +80,7 @@ TimingSimpleCPU::TimingCPUPort::TickEvent::schedule(PacketPtr _pkt, Tick t)
TimingSimpleCPU::TimingSimpleCPU(TimingSimpleCPUParams *p)
: BaseSimpleCPU(p), fetchTranslation(this), icachePort(this),
dcachePort(this), ifetch_pkt(NULL), dcache_pkt(NULL), previousCycle(0),
- fetchEvent(this)
+ fetchEvent([this]{ fetch(); }, name())
{
_status = Idle;
}
diff --git a/src/cpu/simple/timing.hh b/src/cpu/simple/timing.hh
index eebf884ca..8498630b4 100644
--- a/src/cpu/simple/timing.hh
+++ b/src/cpu/simple/timing.hh
@@ -159,7 +159,8 @@ class TimingSimpleCPU : public BaseSimpleCPU
public:
TimingCPUPort(const std::string& _name, TimingSimpleCPU* _cpu)
- : MasterPort(_name, _cpu), cpu(_cpu), retryRespEvent(this)
+ : MasterPort(_name, _cpu), cpu(_cpu),
+ retryRespEvent([this]{ sendRetryResp(); }, name())
{ }
protected:
@@ -176,7 +177,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
void schedule(PacketPtr _pkt, Tick t);
};
- EventWrapper<MasterPort, &MasterPort::sendRetryResp> retryRespEvent;
+ EventFunctionWrapper retryRespEvent;
};
class IcachePort : public TimingCPUPort
@@ -315,8 +316,7 @@ class TimingSimpleCPU : public BaseSimpleCPU
private:
- typedef EventWrapper<TimingSimpleCPU, &TimingSimpleCPU::fetch> FetchEvent;
- FetchEvent fetchEvent;
+ EventFunctionWrapper fetchEvent;
struct IprEvent : Event {
Packet *pkt;
diff --git a/src/cpu/testers/memtest/memtest.cc b/src/cpu/testers/memtest/memtest.cc
index 46387fa01..6f3f9b36f 100644
--- a/src/cpu/testers/memtest/memtest.cc
+++ b/src/cpu/testers/memtest/memtest.cc
@@ -86,9 +86,9 @@ MemTest::sendPkt(PacketPtr pkt) {
MemTest::MemTest(const Params *p)
: MemObject(p),
- tickEvent(this),
- noRequestEvent(this),
- noResponseEvent(this),
+ tickEvent([this]{ tick(); }, name()),
+ noRequestEvent([this]{ noRequest(); }, name()),
+ noResponseEvent([this]{ noResponse(); }, name()),
port("port", *this),
retryPkt(nullptr),
size(p->size),
diff --git a/src/cpu/testers/memtest/memtest.hh b/src/cpu/testers/memtest/memtest.hh
index daed5e5d2..023b878c9 100644
--- a/src/cpu/testers/memtest/memtest.hh
+++ b/src/cpu/testers/memtest/memtest.hh
@@ -84,15 +84,15 @@ class MemTest : public MemObject
void tick();
- EventWrapper<MemTest, &MemTest::tick> tickEvent;
+ EventFunctionWrapper tickEvent;
void noRequest();
- EventWrapper<MemTest, &MemTest::noRequest> noRequestEvent;
+ EventFunctionWrapper noRequestEvent;
void noResponse();
- EventWrapper<MemTest, &MemTest::noResponse> noResponseEvent;
+ EventFunctionWrapper noResponseEvent;
class CpuPort : public MasterPort
{
diff --git a/src/cpu/testers/traffic_gen/traffic_gen.cc b/src/cpu/testers/traffic_gen/traffic_gen.cc
index 1a12b7675..9d8732902 100644
--- a/src/cpu/testers/traffic_gen/traffic_gen.cc
+++ b/src/cpu/testers/traffic_gen/traffic_gen.cc
@@ -61,14 +61,14 @@ TrafficGen::TrafficGen(const TrafficGenParams* p)
configFile(p->config_file),
elasticReq(p->elastic_req),
progressCheck(p->progress_check),
- noProgressEvent(this),
+ noProgressEvent([this]{ noProgress(); }, name()),
nextTransitionTick(0),
nextPacketTick(0),
currState(0),
port(name() + ".port", *this),
retryPkt(NULL),
retryPktTick(0),
- updateEvent(this),
+ updateEvent([this]{ update(); }, name()),
numSuppressed(0)
{
}
diff --git a/src/cpu/testers/traffic_gen/traffic_gen.hh b/src/cpu/testers/traffic_gen/traffic_gen.hh
index 6b3ccbe30..b2039bef9 100644
--- a/src/cpu/testers/traffic_gen/traffic_gen.hh
+++ b/src/cpu/testers/traffic_gen/traffic_gen.hh
@@ -152,7 +152,7 @@ class TrafficGen : public MemObject
/**
* Event to keep track of our progress, or lack thereof.
*/
- EventWrapper<TrafficGen, &TrafficGen::noProgress> noProgressEvent;
+ EventFunctionWrapper noProgressEvent;
/** Time of next transition */
Tick nextTransitionTick;
@@ -206,7 +206,7 @@ class TrafficGen : public MemObject
Tick retryPktTick;
/** Event for scheduling updates */
- EventWrapper<TrafficGen, &TrafficGen::update> updateEvent;
+ EventFunctionWrapper updateEvent;
uint64_t numSuppressed;
diff --git a/src/cpu/trace/trace_cpu.cc b/src/cpu/trace/trace_cpu.cc
index 7b59b49e0..824c1258f 100644
--- a/src/cpu/trace/trace_cpu.cc
+++ b/src/cpu/trace/trace_cpu.cc
@@ -57,8 +57,8 @@ TraceCPU::TraceCPU(TraceCPUParams *params)
icacheGen(*this, ".iside", icachePort, instMasterID, instTraceFile),
dcacheGen(*this, ".dside", dcachePort, dataMasterID, dataTraceFile,
params),
- icacheNextEvent(this),
- dcacheNextEvent(this),
+ icacheNextEvent([this]{ schedIcacheNext(); }, name()),
+ dcacheNextEvent([this]{ schedDcacheNext(); }, name()),
oneTraceComplete(false),
traceOffset(0),
execCompleteEvent(nullptr),
diff --git a/src/cpu/trace/trace_cpu.hh b/src/cpu/trace/trace_cpu.hh
index 07c739c57..c873a349f 100644
--- a/src/cpu/trace/trace_cpu.hh
+++ b/src/cpu/trace/trace_cpu.hh
@@ -1082,10 +1082,10 @@ class TraceCPU : public BaseCPU
void schedDcacheNext();
/** Event for the control flow method schedIcacheNext() */
- EventWrapper<TraceCPU, &TraceCPU::schedIcacheNext> icacheNextEvent;
+ EventFunctionWrapper icacheNextEvent;
/** Event for the control flow method schedDcacheNext() */
- EventWrapper<TraceCPU, &TraceCPU::schedDcacheNext> dcacheNextEvent;
+ EventFunctionWrapper dcacheNextEvent;
/** This is called when either generator finishes executing from the trace */
void checkAndSchedExitEvent();
diff --git a/src/gpu-compute/gpu_tlb.cc b/src/gpu-compute/gpu_tlb.cc
index 1f1a4cc61..b5411f82c 100644
--- a/src/gpu-compute/gpu_tlb.cc
+++ b/src/gpu-compute/gpu_tlb.cc
@@ -61,7 +61,9 @@ namespace X86ISA
GpuTLB::GpuTLB(const Params *p)
: MemObject(p), configAddress(0), size(p->size),
- cleanupEvent(this, false, Event::Maximum_Pri), exitEvent(this)
+ cleanupEvent([this]{ cleanup(); }, name(), false,
+ Event::Maximum_Pri),
+ exitEvent([this]{ exitCallback(); }, name())
{
assoc = p->assoc;
assert(assoc <= size);
diff --git a/src/gpu-compute/gpu_tlb.hh b/src/gpu-compute/gpu_tlb.hh
index 7a7485c48..ee4375259 100644
--- a/src/gpu-compute/gpu_tlb.hh
+++ b/src/gpu-compute/gpu_tlb.hh
@@ -425,7 +425,7 @@ namespace X86ISA
// free memory and do the required clean-up
void cleanup();
- EventWrapper<GpuTLB, &GpuTLB::cleanup> cleanupEvent;
+ EventFunctionWrapper cleanupEvent;
/**
* This hash map will use the virtual page address as a key
@@ -458,7 +458,7 @@ namespace X86ISA
// Called at the end of simulation to dump page access stats.
void exitCallback();
- EventWrapper<GpuTLB, &GpuTLB::exitCallback> exitEvent;
+ EventFunctionWrapper exitEvent;
};
}