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author | Ali Saidi <saidi@eecs.umich.edu> | 2008-02-26 17:28:31 -0500 |
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committer | Ali Saidi <saidi@eecs.umich.edu> | 2008-02-26 17:28:31 -0500 |
commit | 8c0baf2ce478b16d351feb1f0ce147049f3a04f6 (patch) | |
tree | a5a6059ff66fea4c8ed3ab0c31f7cf0031e76e87 /RELEASE_NOTES | |
parent | 8833b4cd44457d50b45a4dfe642cdb5e51c0889d (diff) | |
download | gem5-8c0baf2ce478b16d351feb1f0ce147049f3a04f6.tar.xz |
Update make release, README, and RELEASE_NOTES for b5
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extra : convert_revision : a4958e934f599bff24b251507da7c266c89430fc
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-rw-r--r-- | RELEASE_NOTES | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/RELEASE_NOTES b/RELEASE_NOTES index cd62fb86b..ad0278b89 100644 --- a/RELEASE_NOTES +++ b/RELEASE_NOTES @@ -9,6 +9,22 @@ Outstanding issues for 2.0 release: 7. Testing 8. Validation +March 1, 2008: m5_2.0_beta5 +-------------------- +New Features +1. Rick Strong's Simpoints config changes +2. Support for FSU ARM port +3. EXTRAS= option allow architectures to be specified + +Bug fixes +1. Bus timing more realistic +2. Cache writeback, LL/SC fixes +3. Minor IGbE NIC fixes +4. O3 op latency fix +5. SPARC TLB demap fixes +6. SPARC SE memory layout fixes +7. Variety of MIPS fixes + Nov 4, 2007: m5_2.0_beta4 -------------------- New Features |