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| author | Ali Saidi <saidi@eecs.umich.edu> | 2006-11-28 16:02:13 -0500 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2006-11-28 16:02:13 -0500 |
| commit | ed78fc257b7e55a94cae6a54a0eacf7090ed7f26 (patch) | |
| tree | 87377668811d7863ef9b24bb0f88ffdb4cde43d5 /RELEASE_NOTES | |
| parent | 4fb38e892fde231ca31e6f7feafa4afad69f94ae (diff) | |
| download | gem5-ed78fc257b7e55a94cae6a54a0eacf7090ed7f26.tar.xz | |
add 2.0b2 release notes
--HG--
extra : convert_revision : ce34f8086f682cc732bf868f6b9700e42c604ca3
Diffstat (limited to 'RELEASE_NOTES')
| -rw-r--r-- | RELEASE_NOTES | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/RELEASE_NOTES b/RELEASE_NOTES index 39086de89..03eec3aab 100644 --- a/RELEASE_NOTES +++ b/RELEASE_NOTES @@ -1,3 +1,19 @@ +Nov. 28, 2006: m5_2.0_beta2 +-------------------- +Bug fixes since beta 1: +1. Many cache issues resolved +2. Uni-coherence fixes in full-system +3. LL/SC Support +4. Draining/Switchover +5. Functional Accesses +6. Bus now has real timing +7. Single config file fro all SpecCPU2000 benchmarks +8. Several other minor bug fixes and enhancements + +Outstading issues for 2.0 release: +1. Simulator performance fixes for memory system/caches +2. Multiprocessor linux boot using the detailed O3 CPU model + Aug. 25, 2006: m5_2.0_beta patch 1 -------------------- Handful of minor bug fixes for m5_2.0_beta, |