diff options
author | Gabe Black <gblack@eecs.umich.edu> | 2006-02-27 03:57:15 -0500 |
---|---|---|
committer | Gabe Black <gblack@eecs.umich.edu> | 2006-02-27 03:57:15 -0500 |
commit | 444f520f7e2da9468fa622dcf51859915bd31fd6 (patch) | |
tree | 5d5a217fcc16fe1b89c9625867a54ef87c499813 /arch/alpha/alpha_memory.cc | |
parent | 1a0b326f5d4fafaef206a97ddd02598e120aebb9 (diff) | |
download | gem5-444f520f7e2da9468fa622dcf51859915bd31fd6.tar.xz |
MachineCheckFaults and AlignmentFaults are now generated by the ISA, rather than being created directly.
arch/alpha/alpha_memory.cc:
cpu/base_dyn_inst.cc:
dev/alpha_console.cc:
dev/pcidev.hh:
dev/sinic.cc:
MachineCheckFaults are now generated by the ISA, rather than being created directly.
--HG--
extra : convert_revision : 34a7da41639e93be21ed70dac681b27480008d19
Diffstat (limited to 'arch/alpha/alpha_memory.cc')
-rw-r--r-- | arch/alpha/alpha_memory.cc | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index b2a829711..11baed106 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -380,7 +380,7 @@ AlphaITB::translate(MemReqPtr &req) const // check that the physical address is ok (catch bad physical addresses) if (req->paddr & ~PAddrImplMask) - return new MachineCheckFault; + return genMachineCheckFault(); checkCacheability(req); @@ -511,7 +511,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const fault(req, write ? MM_STAT_WR_MASK : 0); DPRINTF(TLB, "Alignment Fault on %#x, size = %d", req->vaddr, req->size); - return new AlignmentFault; + return genAlignmentFault(); } if (pc & 0x1) { @@ -621,7 +621,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const // check that the physical address is ok (catch bad physical addresses) if (req->paddr & ~PAddrImplMask) - return new MachineCheckFault; + return genMachineCheckFault(); checkCacheability(req); |