Build options are set via a build_options file in the

build directory instead of being inferred from the name
of the build directory.
Options are passed to C++ via config/*.hh files instead of
via the command line.  Build option flags are now always
defined to 0 or 1, so checks must use '#if' rather than
'#ifdef'.

SConscript:
    MySQL detection moved to SConstruct.
    Add config/*.hh files (via ConfigFile builder).
arch/alpha/alpha_memory.cc:
arch/alpha/ev5.cc:
arch/alpha/ev5.hh:
arch/alpha/isa_traits.hh:
base/fast_alloc.hh:
base/statistics.cc:
base/statistics.hh:
base/stats/events.cc:
base/stats/events.hh:
cpu/base.cc:
cpu/base.hh:
cpu/base_dyn_inst.cc:
cpu/base_dyn_inst.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/o3/alpha_cpu.hh:
cpu/o3/alpha_cpu_builder.cc:
cpu/o3/alpha_cpu_impl.hh:
cpu/o3/alpha_dyn_inst.hh:
cpu/o3/alpha_dyn_inst_impl.hh:
cpu/o3/alpha_params.hh:
cpu/o3/commit_impl.hh:
cpu/o3/cpu.cc:
cpu/o3/cpu.hh:
cpu/o3/fetch_impl.hh:
cpu/o3/iew.hh:
cpu/o3/iew_impl.hh:
cpu/o3/regfile.hh:
cpu/o3/rename_impl.hh:
cpu/o3/rob_impl.hh:
cpu/ozone/cpu.hh:
cpu/pc_event.cc:
cpu/simple/cpu.cc:
cpu/simple/cpu.hh:
sim/process.cc:
sim/process.hh:
    Convert compile flags from def/undef to 0/1.
    Set via #include config/*.hh instead of command line.
arch/alpha/isa_desc:
    Convert compile flags from def/undef to 0/1.
    Set via #include config/*.hh instead of command line.
    Revamp fenv.h support... most of the ugliness is hidden
    in base/fenv.hh now.
base/mysql.hh:
    Fix typo in #ifndef guard.
build/SConstruct:
    Build options are set via a build_options file in the
    build directory instead of being inferred from the name
    of the build directory.
    Options are passed to C++ via config/*.hh files instead of
    via the command line.
python/SConscript:
    Generate m5_build_env directly from scons options
    instead of indirectly via CPPDEFINES.
python/m5/convert.py:
    Allow '0' and '1' for booleans.
    Rewrite toBool to use dict.
base/fenv.hh:
    Revamp <fenv.h> support to make it a compile option
    (so we can test w/o it even if it's present) and to
    make isa_desc cleaner.

--HG--
extra : convert_revision : 8f97dc11185bef5e1865b3269c7341df8525c9ad

1 files changed, 7 insertions, 6 deletions

diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 906f60668..39c9397ea 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -34,6 +34,7 @@
 #include "base/inifile.hh"
 #include "base/str.hh"
 #include "base/trace.hh"
+#include "config/alpha_tlaser.hh"
 #include "cpu/exec_context.hh"
 #include "sim/builder.hh"
 
@@ -107,7 +108,7 @@ AlphaTLB::checkCacheability(MemReqPtr &req)
      */
 
 
-#ifdef ALPHA_TLASER
+#if ALPHA_TLASER
     if (req->paddr & PAddrUncachedBit39) {
 #else
     if (req->paddr & PAddrUncachedBit43) {
@@ -129,7 +130,7 @@ AlphaTLB::checkCacheability(MemReqPtr &req)
             // mark request as uncacheable
             req->flags |= UNCACHEABLE;
 
-#ifndef ALPHA_TLASER
+#if !ALPHA_TLASER
             // Clear bits 42:35 of the physical address (10-2 in Tsunami manual)
             req->paddr &= PAddrUncachedMask;
 #endif
@@ -323,7 +324,7 @@ AlphaITB::translate(MemReqPtr &req) const
 
         // VA<42:41> == 2, VA<39:13> maps directly to PA<39:13> for EV5
         // VA<47:41> == 0x7e, VA<40:13> maps directly to PA<40:13> for EV6
-#ifdef ALPHA_TLASER
+#if ALPHA_TLASER
         if ((MCSR_SP(ipr[AlphaISA::IPR_MCSR]) & 2) &&
             VAddrSpaceEV5(req->vaddr) == 2) {
 #else
@@ -339,7 +340,7 @@ AlphaITB::translate(MemReqPtr &req) const
 
             req->paddr = req->vaddr & PAddrImplMask;
 
-#ifndef ALPHA_TLASER
+#if !ALPHA_TLASER
             // sign extend the physical address properly
             if (req->paddr & PAddrUncachedBit40)
                 req->paddr |= ULL(0xf0000000000);
@@ -529,7 +530,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
         }
 
         // Check for "superpage" mapping
-#ifdef ALPHA_TLASER
+#if ALPHA_TLASER
         if ((MCSR_SP(ipr[AlphaISA::IPR_MCSR]) & 2) &&
             VAddrSpaceEV5(req->vaddr) == 2) {
 #else
@@ -547,7 +548,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
 
             req->paddr = req->vaddr & PAddrImplMask;
 
-#ifndef ALPHA_TLASER
+#if !ALPHA_TLASER
             // sign extend the physical address properly
             if (req->paddr & PAddrUncachedBit40)
                 req->paddr |= ULL(0xf0000000000);