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authorAli Saidi <saidi@eecs.umich.edu>2004-09-22 18:25:06 -0400
committerAli Saidi <saidi@eecs.umich.edu>2004-09-22 18:25:06 -0400
commiteb7d32907679c2f19e3bc896a76484f537bc986d (patch)
tree0b6875dc1970f18e6235e91021d81f0408350d2f /arch/alpha/alpha_memory.cc
parent9adb64ec70047d7f8709399f67c74402753f6579 (diff)
downloadgem5-eb7d32907679c2f19e3bc896a76484f537bc986d.tar.xz
fix unaligned memory offset and some small fixes to interrupt binning
code arch/alpha/alpha_memory.cc: Fixed unaligned trap faults arch/alpha/ev5.cc: little more verbose faulting information kern/linux/linux_system.cc: more descriptive errors, and the correct offsets from symbols sim/system.cc: load local pal symbols --HG-- extra : convert_revision : 0c81badf77321d5e1a060dcae2d42204e5a1fc84
Diffstat (limited to 'arch/alpha/alpha_memory.cc')
-rw-r--r--arch/alpha/alpha_memory.cc9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc
index 9f5ab185e..4a350dbfc 100644
--- a/arch/alpha/alpha_memory.cc
+++ b/arch/alpha/alpha_memory.cc
@@ -492,10 +492,11 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
(AlphaISA::mode_type)DTB_CM_CM(ipr[AlphaISA::IPR_DTB_CM]);
- /* @todo this should actually be in there but for whatever reason
- * Its not working at present.
+ /**
+ * Check for alignment faults
*/
if (req->vaddr & (req->size - 1)) {
+ fault(req, write ? MM_STAT_WR_MASK : 0);
return Alignment_Fault;
}
@@ -510,8 +511,8 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const
} else {
// verify that this is a good virtual address
if (!validVirtualAddress(req->vaddr)) {
- fault(req, ((write ? MM_STAT_WR_MASK : 0) | MM_STAT_BAD_VA_MASK |
- MM_STAT_ACV_MASK));
+ fault(req, (write ? MM_STAT_WR_MASK : 0) | MM_STAT_BAD_VA_MASK |
+ MM_STAT_ACV_MASK);
if (write) { write_acv++; } else { read_acv++; }
return DTB_Fault_Fault;