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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2004-04-03 13:46:10 -0800 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2004-04-03 13:46:10 -0800 |
| commit | 65205b82acee56b0034c0122d5f5a89f57c760fc (patch) | |
| tree | 6492d870fa53ee592ca81cafef74e930254351b3 /arch/alpha/alpha_memory.cc | |
| parent | b3b0a4705b27a192226e6f97dc78b97eec73613d (diff) | |
| download | gem5-65205b82acee56b0034c0122d5f5a89f57c760fc.tar.xz | |
More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).
Also missed renames in a bunch of config files somehow.
(See previous changeset for list of renames.)
arch/alpha/alpha_memory.cc:
arch/alpha/ev5.cc:
arch/alpha/faults.hh:
cpu/exec_context.cc:
cpu/exec_context.hh:
cpu/simple_cpu/simple_cpu.hh:
More {Itb,Dtb} -> {ITB,DTB} renames (forgot to test build KERNEL).
--HG--
extra : convert_revision : b2c6ca0916b72b59895520fcacaf028667560a0d
Diffstat (limited to 'arch/alpha/alpha_memory.cc')
| -rw-r--r-- | arch/alpha/alpha_memory.cc | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/arch/alpha/alpha_memory.cc b/arch/alpha/alpha_memory.cc index 13cdb1d73..dea25a440 100644 --- a/arch/alpha/alpha_memory.cc +++ b/arch/alpha/alpha_memory.cc @@ -465,7 +465,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const req->xc); if (write) { write_acv++; } else { read_acv++; } - return Dtb_Fault_Fault; + return DTB_Fault_Fault; } // Check for "superpage" mapping: when SP<1> is set, and @@ -480,7 +480,7 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const ((write ? MM_STAT_WR_MASK : 0) | MM_STAT_ACV_MASK), req->xc); if (write) { write_acv++; } else { read_acv++; } - return Dtb_Acv_Fault; + return DTB_Acv_Fault; } req->paddr = req->vaddr & PA_IMPL_MASK; @@ -512,13 +512,13 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const (pte->fonw ? MM_STAT_FONW_MASK : 0), req->xc); write_acv++; - return Dtb_Fault_Fault; + return DTB_Fault_Fault; } if (pte->fonw) { fault(req->vaddr, MM_STAT_WR_MASK | MM_STAT_FONW_MASK, req->xc); write_acv++; - return Dtb_Fault_Fault; + return DTB_Fault_Fault; } } else { if (!(pte->xre & MODE2MASK(mode))) { @@ -527,12 +527,12 @@ AlphaDTB::translate(MemReqPtr &req, bool write) const (pte->fonr ? MM_STAT_FONR_MASK : 0), req->xc); read_acv++; - return Dtb_Acv_Fault; + return DTB_Acv_Fault; } if (pte->fonr) { fault(req->vaddr, MM_STAT_FONR_MASK, req->xc); read_acv++; - return Dtb_Fault_Fault; + return DTB_Fault_Fault; } } } |