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| author | Andrew Schultz <alschult@umich.edu> | 2004-02-18 21:38:55 -0500 |
|---|---|---|
| committer | Andrew Schultz <alschult@umich.edu> | 2004-02-18 21:38:55 -0500 |
| commit | 12747d3084339d9db52d32e75215242b38474887 (patch) | |
| tree | a053a1f60a14174e873c0507ef5d84daf74a9d9f /arch/alpha/alpha_memory.hh | |
| parent | 2d5ef88e1c782376746c6025843cf2a10ad741a9 (diff) | |
| download | gem5-12747d3084339d9db52d32e75215242b38474887.tar.xz | |
Change the physical memory logic, and also add misspeculation fix to
tlb index calls that are called from ExecContext::readIpr
arch/alpha/ev5.cc:
Fix misspeculation bugs for misspeculated IPR accesses
--HG--
extra : convert_revision : c9ffcf9ef8123dfcaee1606c05aee8ad60d893d7
Diffstat (limited to 'arch/alpha/alpha_memory.hh')
| -rw-r--r-- | arch/alpha/alpha_memory.hh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/alpha/alpha_memory.hh b/arch/alpha/alpha_memory.hh index 482a13eee..999eec228 100644 --- a/arch/alpha/alpha_memory.hh +++ b/arch/alpha/alpha_memory.hh @@ -56,7 +56,7 @@ class AlphaTlb : public SimObject int getsize() const { return size; } - AlphaISA::PTE &index(); + AlphaISA::PTE &index(bool advance = true); void insert(Addr vaddr, AlphaISA::PTE &pte); void flushAll(); |